Wi-Fi Combo Forum Discussions

Hi,

I cannot download the above mentioned zip directory. When I click on the link on page -> https://www.cypress.com/documentation/development-kitsboards/cyw943907aeval1f-evaluation-kit , it opens up the html-ish file at https://www.cypress.com/license-agreement/371207

Can you please help ?

Thanks and best regards

Bhawandeep Singh

Hi

When firmware update is performed, update data acquired from the server is written to "APP0" and "APP1" of the external Flash.
It is a process of updating at a fixed cycle, and I want to write "APP0" and "APP1" alternately at each update. Is this possible?

If possible, please tell us how to implement it.

The implementation environment is as follows.
・ Chip model: CYW43438
・ SDK: WICED-Studio-6.4

Thanks!

Hello there , As I see if i want use from Cypress wifi chips in my project , must use from wiced sdk , now is there any documents that helps me to use from Cypress wifi chips and develop my own sdk and don't use from wiced in my project ? Thanks

I am facing issues with the SDIO communication between our host processor STM32F412RGT6 and the CYW4343W.

The wifi chip is from Murata, type 1DX. See link https://wireless.murata.com/type-1dx.html .

When wiced_init() is called, the wiced platform gets initialized. As soon as line 306 of wwd_management.c gets called the

WPRINT_WWD_ERROR(("Could not set Country code\n"));

country code could not be set. As far as I know it is (one of the) first times the WiFi chip is actually requested for answers. Unfortunately the WiFi chip never responds and a TIMEOUT occurs.

I have found the root cause of this issue and I would like to share the solution with you.

In wwd_SDIO.c there is the interrupt handling of SDIO interrupts present. And here and there are some patches, specific for the STM32F412xG processor, like:

#if defined(STM32F412xG)
    if (current_command == SDIO_CMD_5)
        SDIO->ICR = SDIO_ICR_CCRCFAILC;
#endif

.

This fix is a workaround as stated in the errata sheet published by ST. However, this did not fix the communication problem.

I put a probe of an oscilloscope on the OOB line and noticed the line goes high, an interrupt got fired but the line is never pulled low again. So some interrupt was not handled perfectly. In the beginning of the source interrupt SDIO_MASK_SDIOITIE is NOT enabled for this processor. Why???

Anyway, as stated in the reference manual of the STM32F412RG paragraph 27.6.4 SDIO Interrupt there is written how a SDIO handling should be performed. This is not happening according the manual. The manual clearly states:

When SD card interrupt occurs (SDIO_STA[22] bit set), host software follows below steps to handle it. 
1. Disable SDIOIT interrupt signaling by clearing SDIOITE bit (SDIO_MASK[22] = ‘0’),

This was not happening, so I put the following line of code at line 543 of function sdio_irq:

#if defined(STM32F412xG)
  if ((intstatus & SDIO_STA_SDIOIT) == SDIO_STA_SDIOIT ) {
SDIO->MASK &= ~SDIO_MASK_SDIOITIE;
  }
#endif

It seemed during debugging that SDIO_MASK_SDIOITIE got ENABLED through enabling of SDIO_MASK_CMDRENDIE and SDIO_MASK_CMDSENTIE. Therefore this interrupt MUST be handled. After the disabling, a handling is required and enabling of the interrupt is needed again (this may happen outside the interrupt handler.

Therefor line 412 of host_platform_sdio_transfer at exit:

    SDIO->MASK = SDIO_MASK_SDIOITIE;

MUST be executed, also for the STM32F412RG. Why was this in #ifndef?

Along with these fixes we were able to have good communication with the WiFi chip and we could start developing the rest using WiFi.

Can you please answer on my questions, marked Bold and Underlined.

I know I am not the only one who had this issue, I just kept digging to find the root cause.

A custom platform board is made with the following options:

• wiced sdk 6.4
• CLM blob is placed in internal flash, so with:

• RESOURCES_LOCATION ?= RESOURCES_IN_DIRECT_RESOURCES
  ifeq ($(RESOURCES_LOCATION), RESOURCES_IN_DIRECT_RESOURCES)
  INTERNAL_MEMORY_RESOURCES = $(ALL_RESOURCES)
  GLOBAL_DEFINES += WWD_DIRECT_RESOURCES
  endif

• There is an external 25MHz crystal HSE_VALUE=25000000
• There is an external 32.768kHz crystal on the STM32, and also one on the LPO_IN of the 1DX.
• The PCB lay-out of the WiFi part is 100% Murata's recommendation
• SDIO data lines, CMD and CLK, HOST_WAKE have an external 47k pull-up resistor. WL_REG_ON has a 47k pull-down

• GLOBAL_DEFINES += WICED_DISABLE_WATCHDOG

• GLOBAL_DEFINES += DBG_WATCHDOG_STM32_TIMER

• GLOBAL_DEFINES += WICED_DCT_INCLUDE_BT_CONFIG #not sure if this is needed

• GLOBAL_DEFINES += WICED_DISABLE_MCU_POWERSAVE

• GLOBAL_DEFINES += GPIO_LED_NOT_SUPPORTED

• platform.c only declared wiced i/o pins for UART for the debug information visible through Putty (also stdio_config)
• SDIO config for wifi_control_pins[] and wifi_sdio_pins[]
• SDIO has nvic priority of 2, sdio dma has 3. uart has 6 and uart dma streams have both 7
• SYSCLK is set to 100MHz, the SDIO peripheral gets 48MHz.

• // GPIO pins are used to bootstrap Wi-Fi to SDIO or gSPI mode
  #define WICED_WIFI_USE_GPIO_FOR_BOOTSTRAP_1
  // Wi-Fi GPIO0 pin is used for out-of-band interrupt
  #define WICED_WIFI_OOB_IRQ_GPIO_PIN (0)
  //  Wi-Fi power pin is present
  #define WICED_USE_WIFI_POWER_PIN
  // Wi-Fi power pin is active high
  #define WICED_USE_WIFI_POWER_PIN_ACTIVE_HIGH
  //#define WICED_USE_WIFI_32K_CLOCK_MCO
  // OTA
  //#define PLATFORM_HAS_OTA

Hello,

We are using an FPGA system based on Spartan 6 for an imaging application.  This system is comprised of typical DCDC converters, Analog and Digital Grounds, readout electronics, DDR3 memory to store image data (will need to be updated at some point, and is within the scope of project) and USB to transmit the stored data.

Specifically, CYUSB3014-BZXI is the part which is currently in use.  We would like to upgrade from this USB to WIFI.  As we start to investigate this transition, some questions arise

• Can you provide some documentation for making this transition, I would guess this might already be available, though I did not find much with a quick search?
• Is there some part selection guide and requirements for WIFI?
• I am currently using usblib0 for communication using python (using pyusb).  Can you suggest any python based libraries for interfacing with wifi protocol?
• As we integrate this with FPGA design & layout, is there available some VHDL or verilog module for handling data pipeline.

Those are the questions for now.  Likely will come back with couple more

Thanks and warm regards,

Jerome

Hi

Get "OTA_APP" of external Flash by the instruction from "Bootloader"
I want to write to the RAM in the CPU. Is this possible?

If possible, please tell us how to implement it.

The implementation environment is as follows.
・ Chip model: CYW43438
・ SDK: WICED-Studio-6.4

Thanks!