USB superspeed peripherals Forum Discussions

Hi, 

Does Infineon currently have have a part that go USB3 to MIPI-DSI?

I found this application note where a Crosslink FPGA is used, but I'm wondering if there is any new solution without the necessity of this extra FPGA?

Regards,

Hello everyone, 

We are using Cypress FX3 in an implementation where it reads two input signals with its GPIO pins. Both input signals come from an experimental chip that communicates serially using these two signals. The clock signal (HVCLKTX) is 5MHz, punctuated by periods of zero voltage. The other signal (HVSERTX) needs to be read on each of the rising edges of the clock. Please see below for a better illustration. 

The problem we have right now is that there seems to be a non-negligible time skew between recognizing the rising edge on the clock and retrieving the value from the other data line. We haven't tried using interrupts yet, and we are writing the code to try it now. In the meantime, we would also like the community's advice. 

Thank you very much! 

TheAtralClock

I am looking for an example on how to set up Long_Transfers on the CYUSB3KIT-003. The names of the different firmware examples unfortunately don't mention it. Could use a download or the name of an FX3 example that implements it. 

Much appreciated!

Hello, 

I would like to use CYUSBS236 to print UART debug messages from a CYUSB3014 MCU using CyU3PDebugPrint(); 

I have been testing this using the CYUSBKIT-003 development board, and example code from cyfxusbi2cregmode. 

For my first test I wired the Tx/Miso pin from the dev board to pin 2 of the DB9 connector which is RXD. But I get garbage messages as shown here.  

I also tried connecting Tx to SCB1_0 but get nothing on tera term:

Is there a way to use GPIO_16 as the Output pin in GPIF-II Designer?

Hi,

I have started looking into the Cypress CX3. I want to know what are all the resolutions it will support and its maximum FPS. 

Kindly share the details. 

Thanks

Selvaruban

Hi，

   关于USB3014使用过程中发现2个问题：

1、客户自己做了一些板子，其中有一块板子上的芯片在使用过程中出现不出口，无法弹出USB3.0的FX3口，一开始是有口的，再次尝试几次就不出口了，这种现象应该排查硬件的哪些地方，谢谢。

2、其他正常出口USB3.0 FX3口芯片在用万用表去测量reset引脚电平就出大概率性出现PC端USB3014刷口的情况，这种情况我们该如何处理，谢谢。

Hi,

            I want to tranfer the RAW8/RAW10 bit data to Host using Non-UVC Standard. i got the Raw data on Host , But i dont known , how to split the each frame on Streaming Buffer. 

Kindly help me, PFA..,

I have an FPGA feeding uncompressed counter data into the 32-bit GPIF bus using the AN65974 Slave FIFO state machine.  The data is a 32-bit word with 28-bits as a counter and 4 1-bit flags. The FPGA increments the counter with every write to GPIF and writes to GPIF in bursts of 253 words. These packets are sent to the USB host on PKTEND assertion or when the buffer is full at 16KB-16 bytes. It writes until it sees the watermark assert (configured to assert when >=15372 bytes are received) . The firmware + GPIF has been modified to use GPIF's addressing lines and MultiChannel DMA to alternate data between threads 0 and 1 so when a thread is emptying the other is used (like ping-pong buffers) to improve throughput.

However I am facing an issue that when I capture the packets in Wireshark and examine the data I can see that subsequent counter values in the capture have a difference of exactly 253. This makes me think that only 1 write per burst is actually making it to the FX3's buffer and I am not sure why. If I lower the burst number, I don't get any data travelling to the USB host. What could be interfering with the FX3's ability to accept a full write burst?

Hi,

we are using the cyusb3014 for our image sensor according to the AN75779 application note (UVC). the configuration is standard (bulk in transfers, burst mode of 16 packets)

We occasionally get a retry request from the host, and most of the time it is handled correctly (after the request a few more packets are sent, and then the requested SeqN packet is sent and everything continues as it should)

but we've noticed that if the EoB (end of burst) packet get send during the few packets that are sent before we respond to the retry, the required SeqN packet is not resent, and everything freezes.

if we limit the burst length to 0 (wait for ack after every packet), we do not encounter this "freezing" behavior.

is this a known issue? 
are we doing  something wrong?

thanks!