USB superspeed peripherals Forum Discussions
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Hi ,
Is there any way for me to know the priority details for FX3 firmware? And could i assign a higher priority for GPIO interrupt?Thanks
Regards,
Xiang
Show LessDue to a misinterpretation of the meaning of the INT/CTL15 input it had been connected in hardware to a status signal. So it would be nice to be able to read the level of this pin CTL15 like a GPIO or through another method or by means of other functions. Is this possible in anyway?
Rene
Show LessCurrently we are trying to implement synchronous slave fifo interface with 16/32 bit modes. We want mailbox functionality in our environment. In slave fifo document its mentioned as Register accesses are not done over slave fifo interface.
Whether FX3 P-Port Register access are possible over slave fifo interface.? Also whether we can implement mailbox functionality with slave fifo interface?
Thank you in advance.
Show LessI am working with a FX3 Super Speed Explorer Kit in Linux and I am using the SlaveFIFOSync in APP note AN65974. I was able to get the USB 3 running at about 2Gbps, but USB 2.0 is only 30Mbps (bits NOT bytes). I notice that the burst length in the code is not 16 for the "case CY_U3P_HIGH_SPEED:", but rather it is set to 1. I tried to change it to 16, 8, 4, and 2 and they all will not allow the image to load on the board. I don't know if I am even looking in the right place to speed up the USB 2.0, but I figured it was a good place to start. I need to get the USB 2.0 to run at the ~480Mbps rate. Does anyone have any experience with the USB 2.0 side of the SlaveFIFOSync code?
Thanks
Show LessIn datasheet on FX3 CYUSB301X/CYUSB201X (Rev. *R March 27, 2015) is specified that USB3.0 controller supplied in commercial and industrial temperature ranges. I need CYUSB3014-BZXI in 121pin BGA package and industrial temperature range. But the "Ordering Information" on page 45 in this datasheet shows me "GPIF II Data Bus Width" in 32 bit. I have limitation of 16 bit data width in my artix-7 FPGA design. I can't find any exact answer in that datasheet and on this forum for my answer. Can this controller (CYUSB3014-BZXI) works in 16 bit data width even in case with industrial temperature range?
Show LessI init the gpio with interrupt,when the MCU get a interrupt event,and then if i can disable the interrupt,because i use this gpio as other function?
Show LessHello,
I write a simple code to evaluate FX3 Super Speed capabilities for the project ahead. My Idea is to implement a one BULK out endpoint for video data a 2 Interrupt (IN + OUT) for control/status from sensor unit. Bulk endpoint behave as expected but interrupt one produce a message :<INTERRUPT IN transfer
INTERRUPT IN transfer failed with Error Code:997>
Where I can get info what that means. (All example projects with use of interrupt endpoints I already had examined)
Show LessI was noted that "currently the source code for CCG2 is not available to the customers. We have plans to make Software Development Kit (SDK) available to the customers from February 2016 which will enable the you to develop your own code."
I am wondering why our customers like chiconypower.com.tw can configure the CCG1/2 on their PD charger control board. This board can send CC command to the PD charger to change its output voltage when one some button on the board is clicked.
Show LessHello
The datasheet does not spec the current draw of the VBUS pin for a CYUSB2014. What is the current draw on this pin when using the USB2.0 phy enabled in High Speed mode?
Thank you
Gary
Show LessI'm considering the CYUSB2014 for a USB 2.0 application where I'll be receiving analog video. I'd like to use a simple Video decoder IC like a T.I. TVP5150AM1, which puts out 8-bit ITU-R BT.656 codes as well as horizontal and vertical syncs and active video signals. The data clock is 27 MHz with two clocks per pixel during 720 active pixels (1440 bytes) per line. I only really need monochrome images, so I would like to know if it is possible to program the GPIF II to accept only every other byte during the active video. Otherwise I may need to go to a more advanced chip like the T.I. TVP5146M2, which puts out separate Y and CrCb buses at 13.5 MHz. This is a very space-limited application so I'd prefer to use the smaller IC if possible. Are there any gotchas I'm missing if I go ahead with the ITU-R BT.656 style decoder with 8-bit bus at 27 MHz? I'm worried that if I can't filer out the CrCb bytes of the line I will lose data using USB 2.0. The line-average data rate for this chip in color would be 22.66 MB/s, which is pretty close to the raw bandwidth of the USB at high speed. Filtering out the color components would get it down to a more comfortable 11.33 MB/s (line average). I don't have the option to use USB 3.0 in this application.
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