USB superspeed peripherals Forum Discussions

hello,

   As discussed in the previous post(FX3 SPI COMPATIBILITY ),those are supports 1.8v and 3.0v.

Is any spi flash that supports 3.3V Poer supply?

regards,

geetha.

Hello,

In fx3s, the SPI_SS# PIN is connected to SPI FLASH chipselect. How to disable/enable this pin?

can i make this pin High or high imedence in the firmware?

regards,

geetha.

I‘m trying to cfg CX3 3065 for receiving data with OV sensor, The MIPI CSI-2 is configured as below:

And the MIPI error thread has got some errcnt: frmErrCnt  ctlErrCnt  recSyncCnt  unrecSyncCnt,  So how can i cfg to Eliminate these errors ?

Hi

     I am making an USB Composite device (UVC + CDC),But first I singly test UsbUart.zip  in the address of  http://www.cypress.com/documentation/code-examples/ez-usb-fx3-usb-uart-bridge-example ,  But I want to  intercept data from usb-uart in FX3 fireware,How can I do?Next is my guess and question:

    In the UsbUart project above mention,the USB-to-UART is bridge to another Uart port such as Log Uart(refer to function CyFxUSBUARTAppStart in cyfxusbuart) and the corresponding code peices is as following:

     ......

    /* Create a DMA_AUTO channel between usb producer socket and uart consumer socket */

    dmaCfg.size = size;

    dmaCfg.count = CY_FX_USBUART_DMA_BUF_COUNT;

    dmaCfg.prodSckId = CY_FX_EP_PRODUCER1_SOCKET;

    dmaCfg.consSckId = CY_FX_EP_CONSUMER1_SOCKET;

    dmaCfg.dmaMode = CY_U3P_DMA_MODE_BYTE;

    dmaCfg.notification = 0;

    dmaCfg.cb = NULL;

    dmaCfg.prodHeader = 0;

    dmaCfg.prodFooter = 0;

    dmaCfg.consHeader = 0;

    dmaCfg.prodAvailCount = 0;

    apiRetStatus = CyU3PDmaChannelCreate (&glChHandleUsbtoUart,

            CY_U3P_DMA_TYPE_AUTO, &dmaCfg);

But I want to  intercept data from usb-uart in FX3 fireware,How can I do?Modifing CyFxUSBUARTDmaCallback to get input->buffer_p.buffer and do process, Is that right?   If not ,what can I do?

Hi !

In the cyfxbulklpauto.c of AN87216 - Designing a GPIF II Master Interface,there is a CyU3PDmaChannelSetXfer.

In the

CyFxBulkLpApplnStart (

        void)

UtoP and PtoU all been set.

But in the

CyFxBulkLpApplnUSBSetupCB (

        uint32_t setupdat0, /* SETUP Data 0 */

        uint32_t setupdat1  /* SETUP Data 1 */

    )

why it doesn't be used to  CyU3PDmaChannelSetXfer(glChHandleBulkLpPtoU,CY_FX_DMA_TX_SIZE)and CyU3PDmaChannelReset(&glChHandleBulkLpPtoU) did not  be set either.

According to this document: http://www.cypress.com/file/138771/download the cypress USBSuite has been released with version 1.2.3.20 on 13/04/2018.

This release includes the windows driver files (CyUSB3.sys,...) with version 1.2.3.20.

The release of the whole sdk: http://www.cypress.com/documentation/software-and-drivers/ez-usb-fx3-software-development-kit on a later date 30/05/2018 only contains the driver files and driver sources for version 1.2.3.16.

We are looking for the driver source files version 1.2.3.20. We don't find them anywhere on the official pages. Are these available?

I am working on Cypress FX3 USB3.0.I am using EZ USB FX3 SDK/1.3/Application/cpp/Streamer.Now in streamer.h code ,there is one function called "Xferloop()".In this function I want to collect the data of "buffer" character by character basis and want to store in "myfile.txt".I am only able to store buffer value (between start and stop) but not character by character.Please help.

Hello Everyone,

I am working on a project which needs firmware to be stored in SPI Flash memory, As i know CYUSB3KIT-003 does not have any SPI flash memory on it. and i cannot program on i2c eeprom? Do we have any other evaluation kit which have SPI flash?

My second question is

If we program i2c eeprom on FX3 and store firmware on it, can we use i2c for other application like interfacing with some other IC or component?

Thanks

Dear all,

with the cypress FX3 slave fifo implmentation example already comes an FPGA image for altera devices.

In this example, there is a timing constraints file for setting set_output_delay at the output from FGPA to FX3 GPIF II.

However, set_input_delay is missing form this example. In my loopback project, where I'm using the provided loopback example image for fx3 an for altera FPGA I recognize that sometimes 1 Bit of 32 GPIF data word arrives wrong at the fpga.

In the pdf for slave fifo implementation there is the timing diagram for read and write transfers for fx3 (see attached images). However I'm not sure what values of it I need to set correct input_delay.

Altera recommends for input delay:

set_input_delay -max [$period - Tsu]

set_input_delay -min [Th]

But what are Tsu und Th in the READ from FX3 diagramm???