USB superspeed peripherals Forum Discussions
Hello everyone:
My project was originally created in the 1.3.3 SDK, and both the Release version and the Debug version can run very well. When I upgraded the SDK to 1.3.4, I found that my project was able to run well under the Debug version, but the Release version would fail.Have you encountered this situation?
Here is my questions:
1.I hope to get the difference between the Debug version and the Release version.
2.I want to know where the Release version compiler will optimize.
3.I hope to get more details about the APIs such as CyU3PDebugPrint(), CyU3PUartTransmitBytes(), CyU3PUartReceiveBytes(), etc.
4.I want to know which way to find a solution to this situation? Or what is the problem?
Here is my configuration of paths:
1.
2.The operating system used is Windows10.
Attachment is my source code
everyone can reply.
Best regards,
Luca L.
Show LessHello,
I am working on a custom board based on FX3 that has no EEPROM or hardcoded bootloader to acommodate 0xA0 vendor requests without implementation. So I implemented my own vendor request that transfers from a computer to RAM the image of a firmware, Since I want to execute it as well I thought that modifying the reset interrupt and then causing a warm reset would do the trick. However I am unable to figure out how can I know the entry point of a firmware I am uploading at runtime and if it is possible to do it without having to request for it as parameter. How does the hardcoded bootloader know what the entry point of an image soon to be uploaded to RAM is ?
Any help would be really appreciated.
Thank you in advance
Georgios
Show Lesshi,
I'm working at Intel. We're using EZ-USB® FX3 SW Development kit in our validation lab and looking now for Gen2 version of it.
I saw answer that it probably will be released by the end of 2019.
Is there any chance to get samples before?
Thanks,
Irena
Show LessWe've been shipping a product for several years that uses bulk transfers at variable rates (up to about 200 MB/s) to stream data. It's been working well on a wide variety of computers, but recently we've noticed new laptops (i7-8750H processor) don't service the bulk data (IN) transfers in a timely manner. It looks like as soon as they catch up with the pending data, they wait maybe a millisecond or more before retrieving more data, causing occasional gaps in the stream (we only have about a millisecond of buffer on the FX3). Oddly enough, increasing the CPU load seems to eliminate the problem.
Has anyone else seen this? Is there a better workaround (other than switching to isochronous transfers)? Thanks in advance.
Show LessHi,
I am using CYUSB3014 and the confusion is, It's mentioned in the datasheet that the max SPI flash memory is 32Mbit. Is it possible to change or increase this SPI flash memory capacity. Please help on this.
Show LessHello,
I am using fx2lp in slavefifo configuration (IFCONFIG=0x03) with 8 bit data bus( WORDWIDE=0).but i am not able use FD[8:15]/PD[0:7] Pins as GPIO.
I tried with LEB blinking.If fx2lp in ports mode,led connected to PD5 is blinking.
if fx2lp in slavefifo configuration,led connected to PD5 is not blinking.why this is hapeening?is there any other register settings in order to use PD5 as GPIO?please let me know.
regards,
geetha.
Show LessHello,
I would like to use the FX3 with both a ADC and a DAC. There seems to be only one clock pin "PCLK" on the FX3 but it would seem two are required: 1) output of FX3 into DAC and 2) input to FX3 from ADC. Is this possible?
Thanks!
Show LessIs it possible to take steps to be able to run the FX3 GPIF II Slave FIFO at 125 MHz?
Background: We have a very noise sensitive system and would like to base all clocks on a common 125 MHz clock (or divisions). This means our only feasable clock frequencies are 62.5 MHz and 125 MHz.
Show LessIn bulkloop example ,I changed Standard super speed configuration descriptor as adding an interface.
But it cann't work .I could find another interface.Could tell me how to make as UVC having two interface ?
Show Less
Hello.
I have a Denebola dev board.
I try set resolutions 1280x960 and 2592x1944 and not success...
Very difficult...
I try, try, try...
Please help me...
I use Cypress EZ USB suite, but MIPI configurator not easy for me...
I have NDA with Omnivision...
Don't understand.
My descriptors for USB2:
// Class specific Uncompressed VS frame descriptor 2 - 2592x1944 @ 1fps
0x1E, // Descriptor size
CX3_CS_INTRFC_DESCR, // Descriptor type
0x05, // Subtype: Uncompressed frame interface
HS_RES_1944, // Frame Descriptor Index: 1
0x00, // No Still image capture method supported
0x20, 0x0A, // Width in pixel: 2592
0x98, 0x07, // Height in pixel: 1944
0x00, 0x30, 0xCE, 0x04, // Min bit rate (bits/s): 2592 x 1944 x 2 x 1 x 8 = 80621568 = 0x04CE3000
0x00, 0x30, 0xCE, 0x04, // Max bit rate (bits/s): Fixed rate so same as Min
0x00, 0xC6, 0x99, 0x00, // Maximum video or still frame size in bytes(Deprecated): 2592 x 1944 x 2
0x80, 0x96, 0x98, 0x00, // Default frame interval (in 100ns units): 10000000 ( 1 fps )
0x01, // Frame interval type : No of discrete intervals
0x80, 0x96, 0x98, 0x00, // Frame interval 1: Same as Default frame interval
// Class specific Uncompressed VS frame descriptor 1 - 1280x960 @ 5 fps
0x1E, // Descriptor size
CX3_CS_INTRFC_DESCR, // Descriptor type
0x05, // Subtype: Uncompressed frame interface
HS_RES_640, // Frame Descriptor Index: 2
0x00, // No Still image capture method supported
0x80, 0x02, // Width in pixel: 1280
0xE0, 0x01, // Height in pixel: 960
0x00, 0x00, 0xDC, 0x05, // Min bit rate (bits/s): 1280 x 960 x 2 x 5 x 8 = 98304000 = 0x05DC0000
0x00, 0x00, 0xDC, 0x05, // Max bit rate (bits/s): Fixed rate so same as Min
0x00, 0x80, 0x25, 0x00, // Maximum video or still frame size in bytes(Deprecated): 1280 x 960 x 2 =
0x80, 0x84, 0x1E, 0x00, // Default frame interval (in 100ns units): 2000000 ( 5 fps ).
0x01, // Frame interval type : No of discrete intervals
0x80, 0x84, 0x1E, 0x00, // Frame interval 3: Same as Default frame interval
What MIPI are nedeed?
Show Less