USB superspeed peripherals Forum Discussions
HI,
A note on page 8 of the CYUSB306X datasheet states the following:
REFCLK and CLKIN must have either separate clock inputs or if the same source is used, the clock must be passed through a buffer with two outputs and then connected to the clock pins.
For the same source approach, I presume the buffer is required to optimize signal integrity. However, what if I were to route the output of the clock source (i.e. oscillator) to REFCLK and CLKIN in a daisy-chain fashion with a termination resistor to GND at the end of the trace as shown in the figure below? Note that the termination resistor matches the characteristic impedance of the trace to ensure no reflections. Assuming that the clock source has a very low output impedance, it seems that the resulting waveform at the REFCLK and CLKIN inputs would meet the requirements of the CYUSB306X. In other words, is there some other reason - aside from signal quality degradation - that the buffer is required if a single clock source is used for REFCLK and CLKIN?
Regards,
James
Show LessHi,
i am working on an FX3 project. On my Laptop (debian buster) every thing works fine. when i connect the fx3 over usb 3 to a jetson tegra tx2 i get following error in dmesg:
[256143.872836] xhci-tegra 3530000.xhci: ERROR:unexpected command completion code 0x11.
[256143.880712] xhci-tegra 3530000.xhci: xhci_reset_bandwidth called for udev ffffffc1bf5f5800
[256143.889126] usb 2-1.1.1: can't set config
The tegra runs on ubuntu 16.04. L4T R28.2.0.
This only happens if i connect the fx3 to the usb 3 port.
Anyone an idea why this happens?
Sincerely Josef Sommerauer
Show LessHello,
Question to the State Machine from the GPIF II Designer.
is there a possibility to switch a state after a spezified time?. Something like, if you in State1 longer then 5 Seconds, goto state 2
kind regards
Matthias Macho
Hello,
This question has two parts: partial flag and throughput, they seem strangely interlinked.
I am using the example project 'slfifosync' located in: C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\firmware\slavefifo_examples\.
I want to implement a FPGA -> FX3 -> PC link, such that data generated on the FPGA is sent through to the PC, therefore I used this example project as a start. My current implementation:
FPGA: the FPGA writes 1024 Bytes of data (512 x 16bit transfers, on the last word which I transfer I assert nPKEND. PCLK is 50MHz.
The FPGA FSM waits for flag A (the full flag) before starting to write to the FX3. It then writes the 1KB of data, whilst monitoring flag B (the partial flag blue). After completing the first 1KB write, it starts over, and does this until it reads an asserted flag B.
On the oscilloscope, I see that the partial flag (blue) does not assert, whereas the the full flag (flag A, green), does assert. Naturally this results in buffers being overwritten. See image 1:
Image 1:
FX3: the FX3 is setup to auto DMA with the following config,
dmaCfg_auto.size = burst_len*size;//16*1024;
dmaCfg_auto.count = 8;
dmaCfg_auto.prodSckId = CY_FX_PRODUCER_PPORT_SOCKET;
dmaCfg_auto.consSckId = CY_FX_CONSUMER_USB_SOCKET;
dmaCfg_auto.dmaMode = CY_U3P_DMA_MODE_BYTE;
CyU3PDmaChannelSetXfer (&glChHandleSlFifoPtoU,0);//0 is for infinite transfer size
epCfg.enable = CyTrue;
epCfg.epType = CY_U3P_USB_EP_BULK;
epCfg.burstLen = burst_len;//where burst_len = 16 when USB 3
epCfg.streams = 0;
epCfg.pcktSize = size;//where size = 1024 when USB 3
and in cyfxslfifousbdscr.c:
/* Endpoint descriptor for consumer EP */
0x07,
CY_U3P_USB_ENDPNT_DESCR,
CY_FX_EP_CONSUMER,
CY_U3P_USB_EP_BULK,
0x00,0x04,
0x00,
/* Super speed endpoint companion descriptor for consumer EP */
0x06,
CY_U3P_SS_EP_COMPN_DESCR,
16 - 1,//i.e. burst_len -1
0x00,
0x00,0x00
Here is the kicker: when I change
dmaCfg_auto.size = burst_len*size;//16*1024;
to
dmaCfg_auto.size = size;//1024
the partial flag is toggled as expected. Furthermore, the throughput increases from 17600KBps to 89500KBps, measured using Cypress’ C++streamer app. (Packets per TX: 8, Xfers to Queue: 64), see image 2:
Image 2:
I would assume increasing dmaCfg_auto.size would increase the throughput as various posts have made clear, however, as I have explained, the opposite is true.
Although 87MBps is not bad throughput, I know a faster throughput is possible.
What am I doing wrong? Please help.
I also attached the full FX3 project.
The PMODE[2:0] pin is Z11(USB boot):failure and no response on PC.
The PMODE[2:0] pin is Z1Z(I2C boot):can be identified and working properly.(Of course, I solder an external EEPROM and switch to I2C boot.)
Why the PMODE pins are incorrect in USB boot but correct in I2C boot? These pins are pulled up by a 10K resistor, including RESET. This pin of INT_N_CTL15 does not care about it (I found that CYUSB3KIT-003 does the same). I tested the floating pin voltage to be around 0.2V. What caused this problem? How can I make the chip recognize PMODE?
I compared the evaluation kit (CYUSB3KIT-003). On the kit, the INT_N_CTL15 (L8 of 3014) pin is high when booting from I2C, and low when starting from USB mode. But the development board I designed, whether it is USB or I2C, this pin is high level. Will the USB mode boot failure be related to this?
Sincere regards
Haisen
Show LessHi,
is it not necessary to set simple or complex GPIO in CX3? Are the GPIO's already enabled after the call of CyU3PDeviceConfigureIOMatrix?
I get an error if I try to configure GPIO17... GPIO19 to simple gpio from CyU3PDeviceConfigureIOMatrix.
thanks,
lumpi
Show LessHello sir ,
Actually i am interfacing ov7670 camera module with fx3
board,and for functioning ov7670 it requires external clock in mhz.so, i am
generating pwm on fx3 pin for which i have merged uvc code with that of
complexgpio.But ,the problem is only pwm part is working and a pulse of mhz
is generated on fx3 pin.but in device manager uvc is not appearing.. Below i
have attached my code,can you please tell where i have done mistake.
Thanks
Manisha
Show LessHai,
I am developing a USB 3.0 card with Cypress device(CYUSB3014) and interface the external device with Xilinx Spartan 6(XC6SLX9-3TQG144C) device...i am using Control center Utility,to load the SFloopback.img file in ram,and under the configuration tree through Bulk out endpoint i send the data(Test.txt-5A 5A 5A 5A...) from usb host to Fx3. Program the xilinx with AN65974 vhdl file.so i click the Bulk in endpoint(Transfer data in) option,i didn't get loopback data,but some data comes incorrectly,and it was incremented contiously....
My question is
1. Where the Bulk out Endpoint Data to be stored in Fx3 Device???
2.In AN65974 slave fifo xilinx file having fifo option,so why the loopback funcion not working properly???
Show LessHi
I used the official example cyfxbulklpauto_cpp, the code makes the following changes:
EP config in super speed mode:
1. epType is set to CY_U3P_USB_EP_BULK
2. burstLen is set to 2
3. pcktSize is set to 1024
DMA config:
1. size is set to 1024
2. count is set to 8
When the data source rate is high (the speed more than 100Mbp/s), I run the C++ streamer, it works normal.
However, when data source rate is high (the speed less than 20Mbp/s), I can't receive any data from CY3014
I saw on BBS that other people had the same problem, but there was no answer, How can I receive low speed data from CY3014?
Thanks
Show LessHi community
I'm setting up the 16-bit parallel FX3 camera data with the parameters below:
16-bit synchronous parallel data interface 16 bits per pixel
YUY2 color space
1280 x 720-pixel resolution (720p)
30 frames per second
Active low frame/line valid signals
Negative clock edge polarity
I use the firmware provided in AN75779.zip. The only change is to convert from 8-bit to 16-bit, Negative clock edge polarity and Active low for FV,LV.
For 16-bit synchronous parallel data interface, I go to the Interface Definition tab in GPIF II Designer and choose the 16 Bit option for Data Bus Width, Negative clock edge polarity and Active low for FV,LV. Then i go to the state machine tab, change the counter limit value of LD_DATA_COUNT and LD_ADDR_COUNT to 8183.Finally, i update the cyfxgpif2config.h.
But I just got the black screen. I added DEBUG_PRINT_FRAME_COUNT and print "Bytes per frame" is only received:
Leaving Suspend Mode
UVC: Completed 0 frames and 0 buffers
Application Started
UVC: Completed 0 frames and 0 buffers
Bytes per frame 480
Bytes per frame 480
Bytes per frame 480
...
Bytes per frame 480
UVC: Completed 60 frames and 0 buffers
Bytes per frame 480
Bytes per frame 480
Bytes per frame 480
...
Bytes per frame 480
UVC: Completed 90 frames and 0 buffers
Bytes per frame 480
...
Can show me how to solve this problem. Thanks in advance.
Show Less