USB superspeed peripherals Forum Discussions

Hello, 

I'm trying to stream MIPIraw 10 1920X1080 60fps in CX3 Denebola kit, When I tried to tried to stream camera in Linux host I got CB failure. Kind suggest some solutions to resolve this problem .

Thankyou

Hello,

Through different questions already asked on your website, we have been able to solve majority of our issues. 
However, for the custom we are currently developing, we cannot have the USB3.0 interface working.
We would like to solve this issue in the next iteration of our custom board by understanding what is preventing us from using the USB3.0 interface on this very design. 

To avoid you some extra questions, I have resumed most of the things we developed, tested and probed.

• Schematics / layout
  The board is using the example/guidelines given by cypress AN70707
  The board is using the reference given by eCon Systems for their CX3 + OV5640 Dev board schematics. 
  SSTX+ and SSTX- have both a 0.1uF 10% 6.3V capacitor placed close to the CX3.
  The connector used is a B8B-PHDSS(LF)(SN) with a custom cable using USB3.0 Type A on the other end.
  This cable is expected to work fine as it is used on another device.
  If necessary I can share the schematics/layouts related to the USB3.0 lanes. 
  
  
• Firmware
  We did not apply any modification in the firmware regarding the USB3.0 interface and the clocks used. Ou custom board is working fine on USB2.0. Is there attention that should be given to something before expecting the CX3 to enumerate as USB3.0 ? At this stage, we are only looking to enumerate as 3.0, even with an example firmware and this is not working.
  
  
• U3TX and U3RX powers
  We have originally measured a noise above 30 mV on these lanes and as such we have disconnected these lines from the onboard voltage regulator and supply them with a external stabilised power source which was giving 20 mV of noise. This didn't solve our problem and CX3 was still recognise as USB2.0 only.
  
  
• SSTX and SSRX wires
  I have probed the SSTX and SSRX lanes before, during and after the firmware flash and can't see any real activity. The images attached are the results obtained in all of the case above. My oscilloscope is only rater for 110MHz, it might be complicated to probe these lanes correctly. 
  
  
• Wireshark
  As I have seen in similar topics that Wiresharks data were important. I have attached to this message the Wireshark file recording from device being plugged in to firmware flashed and video correctly streaming. 

As a potential important point, the onboard clock is 19.2MHz and not 24MHz.

I'm absolutely available if you need any more info or if you want me to test something else.
Thanks i
My colleague @cam will also follow this topic and answer your potential questions. 

Good afternoon,

I am currently working on getting a new camera working on the same Cypress CX3 chip. We have created a very similar board to the one we have been using for the IMX241 with changes only to the LED illumination system and the camera connection to accommodate the larger packaged sensor, the IMX412. 

This IMX412 is a 4056x3050 sensor. I have set this sensor up to output its central 5MP at 2592x1944 to match our previous camera’s setup. This streams at 43.4 fps with the current settings I have in place.

My current issue is that the device tends to reset quite often. And by reset I mean the following (from UART output):

EVENTFLAG Timer Reset Event, IsCameraSupposedtoBeRunning: 1, FrameIndexToSet: 2, FrameIndex: 2

APP STOP

This occurs just about 95% of the time within 60 seconds of streaming. My goal is to understand and mitigate this response as best as possible.

My understanding is that this occurs when the host has not pulled the data in the expected amount of time before the device is ready to output its’ next image. I am currently using Direct Show for my image capture. This is set up through a callback method and not doing any processing what-so-ever and just pulling the images into my program and releasing them after confirming a viable image in order to output FPS values.

My current Descriptor Settings:

My Hard set values:

My CX3 Clock:

My Camera Clock:

Continued:

Camera Lines: **I have not been able to effectively reduce the Total pixels per line without causing a “step response” seen below the values.** Different problem but need to solve after this. Will only get us a max of 3 more fps since the device cannot handle more than 47 fps from this camera.

Please let me know if I can provide any more additional preliminary information to aid your understanding of this current issue. Thank you for your time.

Hi,

I faced a strange behavior in the execution of the firmware sequence, I have used RAM mode booting to load the firmware while developing and testing. In the firmware, I have created a thread in which CX3 will communicate GPS through I2C. The I2C block of CX3 is initialized at ApplnInit API. 

In this case, if I load the firmware directly to the RAM then everything works fine. If I write the same firmware into SPI flash and then change the boot mode to SPI then I2C between CX3 and GPS fails initially. After debugging I found that the thread in which CX3 communicates with GPS through I2C was executed before ApplnInit - I2C init part. After I fixed that issue by adding some delay in the starting of the thread.

But I need clarification on how the execution sequence differs if boot mode changes between RAM and SPI. Please clarify this.

Beat Regards,

Vignesh Kumar R.

Hello guys!

I would like to ask a question about the conversion for image format from RAW10 to YUV2. The CX3 MIPI configuration for my project is that the sensor format is using RAW10 as input and the output format is 16bit (YUV2) in EZ-USB.

I do not know how to convert image format in Windows system. The system is reading the RAW format image as YUV2. Currently, I am trying to use OpenCV to make the image format conversion, but I have met some difficulties. Would anyone mind providing the demo code or any suggestions for me?

Best regards,

Sherry

We purchased a Terasic C5G FPGA board + FX3 Explorer Kit + Altera HSMC adapter board. According to Terasic's manual the voltage standard for the signals on the HSMC port is 2.5V. But on the FX3 Explorer Kit I can only select either 1.8V or 3.3V (with jumper J2). I already tried to find an answer in the Explorer Kit's manual but was unable to. The question is: What to do? Is the FX3 Explorer board 2.5V tolerant when set for 1.8V I/O operation? Afaik the C5G board is not 3.3V tolerant for 2.5V I/Os, right?

FX3 Slave FIFO active edge can be set by firmware. If I set,for example, negedge as the Active edge,does it mean both read and write operation use negedge?