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I am successfully using the sample slave fifo interface with an FPGA and want to reduce the number of pins. Is it possible to control OE (output enable) based on the 2bit address rather than on a dedicated pin?
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I also want to combine the slrd_b and slwr_b signals into a signal signal that gets decoded based on the address lines. I could easily do this if the address were available in the transition equations dialog. Is this a limitation of the GPIF? In summary, can I make state transitions based on the address lines?
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Hi,
I think you can combine slrd_b and slwr_b signals into a single signal that gets decoded based on the address lines.
But here you cannot use address lines (A0 or A1) on the transition equations.
But you can try the following thing:
You can add CMP_ADDR action in a state where you are doing IN_ADDR action. Then you will get ADDR_CMP_MATCH event in the transition equations. So you can try to decide read or write based on that event.
Please let me know if that does not work.
Thanks,
Sai Krishna.