FX3 SPI timing control

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KeWa_2323766
Level 4
Level 4
25 sign-ins First solution authored 25 replies posted

I am using SPI to read/write register values of 2 sensors. At the same time, I used the same  SPI flash memory for booting image storage and for user data storage. SPI read/write will happen for 2 sensors and flash memory user data. I have 2 questions regarding SPI I meant to use,

1. 3 GPIOs are used to select the 3 SPI devices: 2 sensors and 1 flash memory. will this cause SPI problem at the start up since at default all GPIOs are Power on default low while all 3 SPI devices has SSN low level valid.

2. timing control.  1 sensor has the following read/write timing requirement. The register address length together with the operation indicator totally 10 bit long while the register value is 2-byte long. SCK is 10MHz. Firmware has to be able to reconfigure SPI CyU3PSpiConfig t.wordlen from 10 bit to 16 bit within 0.5 SCK clock cycle, which is 50ns. It is quite hard.  I try to use SPI register mode. But for register mode, every transfer is 8 bits. for the 10 bit, if pack it in left, the 6 padding '0' will be take as part of the register address, while the lower address 6 bits will be considered to be the register value. Such mess will happen to the following register values.  So far, I have not get a success yet.

pastedImage_0.png

Thanks in advance.

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1 Solution
Hemanth
Moderator
Moderator
Moderator
First like given First question asked 750 replies posted

Hi,

You can try the following setting in SPI Reg mode:

spiConfig.ssnCtrl    = CY_U3P_SPI_SSN_CTRL_HW_EACH_WORD;

spiConfig.wordLen    = 26;

I have filled a buffer as below:

            data[0] = 0xFE;

            data[1] = 0xFF;

            data[2] = 0xFF;

            data[3] = 0x02;

Output is as below:

pastedImage_0.png

As you can see, the SSN is asserted for 26 bits and the 26 bits of data buffer is sent out. You can change the endianness by using spiConfig.isLsbFirst.

The above method is for writing since the sending should happen on the same edge (raising edge)

For read since the sampling should be done on another edge, you can try below:

Make SSN software controlled, Initially configure the wordlen as 10, send the word, immediately after sending you can make few register writes to reconfigure the Block's word len to 16, cpol and cpha as needed and then read the word.

This is not tested. You will have to try the same.

Regards,

Hemanth

Hemanth

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1 Reply
Hemanth
Moderator
Moderator
Moderator
First like given First question asked 750 replies posted

Hi,

You can try the following setting in SPI Reg mode:

spiConfig.ssnCtrl    = CY_U3P_SPI_SSN_CTRL_HW_EACH_WORD;

spiConfig.wordLen    = 26;

I have filled a buffer as below:

            data[0] = 0xFE;

            data[1] = 0xFF;

            data[2] = 0xFF;

            data[3] = 0x02;

Output is as below:

pastedImage_0.png

As you can see, the SSN is asserted for 26 bits and the 26 bits of data buffer is sent out. You can change the endianness by using spiConfig.isLsbFirst.

The above method is for writing since the sending should happen on the same edge (raising edge)

For read since the sampling should be done on another edge, you can try below:

Make SSN software controlled, Initially configure the wordlen as 10, send the word, immediately after sending you can make few register writes to reconfigure the Block's word len to 16, cpol and cpha as needed and then read the word.

This is not tested. You will have to try the same.

Regards,

Hemanth

Hemanth