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USB Low-Full-High Speed Peripherals

Anonymous
Not applicable

Hi all,

   

I created the system that 4k byte data is transferred through EZ-USB bulk transfer. FPGA (target side) create 4k byte data created and host side received data.

   


But we sometimes found that EZ-USB FX2 packet data is lost 512*N byte data. And packet reading time is sometimes takes 100msec or more. (usual case average is 16-17msec)

   


EZ-USB FX2 has two 512 byte buffer that is used as FIFO. I guess to have it overwritten unexpectedly.

   

This same experience that someone for?

   

And how you resolved?

   

 

   
    The following are the details.   
   
          Environmental    
FPGA: Actel APA-450-BG456    
Driver: Windows almost as a sample using the Bulk Transfer    
PC OS: WinXP    
USB Target: 512byte * 2 FIFO memory used in    
    
    
          System Specifications    
• USB Bulk Transfer    
• Baud rate is about 2Mbps    
• FPGA allows every 16msec burn data to create a 4K SRAM save nearly    
• FPGA look at the USB Overflow flag Overflow if not designed to write data    
• Host-side applications, a simple data earnestly Read    
    
          worrisome phenomenon    
• The data of received at the host is 512*N bytes lost    
• Read by the host, but sometimes time-consuming than the 100msec   
   
          Read the host side code   
   
         ResetEvent(h->overlappedIn.hEvent);   
   
         h->overlappedIn.Internal = 0;   
   
        
   
         success = ReadFile(h->handleIn,   
   
                            pData,   
   
                            maxLength,   
   
                            pReadLength,   
   
                            &h->overlappedIn);   
   
        
   
         if (!success) {   
   
             if ( GetLastError() != ERROR_IO_PENDING ) {   
   
                 DebugVal("ReadFile Error = %d", GetLastError(), DEBUG_LEVEL_ERR);   
   
                 return DEV_DEVICE_IO_ERROR;   
   
             }   
   
         }   
   
        
   
         waitResult = WaitForSingleObject(h->overlappedIn.hEvent,timeOut);   
   
        
   
         if (waitResult == WAIT_TIMEOUT) {   
   
             CancelIo(h->handleIn);   
   
             DebugMsg("ReadFile Error = WAIT_TIMEOUT", DEBUG_LEVEL_ERR);   
   
             return DEV_TIMEOUT;   
   
         }   
   
        
   
         GetOverlappedResult(h->handleIn,&h->overlappedIn,pReadLength,FALSE);   
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2 Replies
Anonymous
Not applicable

I have similar if not exact setup and see the same intermittent errors.  Interested to see solution.

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Anonymous
Not applicable

What is the type of endpoint used? Is flow control used on the FPGA-FX2LP interface i.e. check if buffer is available before sending data.

   

Regards,

   

Anand

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