USB EZ-PD™ Type-C Forum Discussions

What is the full sequence that USB specifies or CCG implements when a USB connection is established?

Following are the functions that I understand are used to setup the connection. Is there any documentation that shows the full sequence and what method each step is using to communicate?

Cable Detect
Symmetry Detect and Flip if required
DFP/UFP/DRP Detect and Source 5V if required
Equipment Detect via Vendor Defined Messaging (VDM) or Alternate Mode Negotiation
Power Delivery (PD) Negotiation then Power Change

Is there a medium level explanation of each step - Or is the USB Specification the recommended source for the detailed handshaking and negotiation?

I'd ideally like to see some mid-level explanations like the following. Note: The following explanations have NOT been verified for accuracy - I am posting this request to see if there is a nice explanation before recreating what may already exist.:

Cable Detect
==> Sees a change in voltage on a CC line
Symmetry Detect
==> Which specific line sees the voltage change determines the orientation of the cable being plugged in. The CC line is the line that sees a voltage change. The data lines are swapped on the socket side of the connection if required.
Direction Detect
==> The level of voltage detected indicates which device is configured initially as DFP/UFP/DRP to determine who supplies the 5V or if further negotiation is required.
Vendor Defined Message (VDM) and Alternate Mode
==> A special message is sent that lists capabilities of the connected device.
If the message indicates a configuration of the USB connection and both sides agree, the bus is used as agreed. This could be sending Video over one or more of the data lanes or setting up something totally unique.
==> If both sides do not understood what the other side wants or can't accomodate the request, the connection defaults to standard USB and information from a Billboard device is sent over the USB interface. The Billboard information is typically a message in human readable format describing what one side was attempting to do.
Power Delivery
==> A source capable of supplying multiple power options will send a list of those power options across the USB.
==> The sink will have the option to select one of the power options.
==> If the sink selects a Power Option other than default, the Source will then supply the requested power.

Our application is TYPE-C DRP role and customer follow below "back voltage test"  item to verify VBUS voltage. ( "PASS" condition is VBUS under 0.4mV )

http://www.testusb.com/backvoltage_issue.htm

They uses a type-c to a cable to connect between our board (DUT) ( C port ) to Back Voltage fixture board ( A port)

Because type-c to a cable's A port side is not real connected with Host that cause a problem - The problem is that PD is always toggling Rp and Rd on both the CC lines and stay type-c disconnection status.

and test result is fail, because VBUS voltage is 0.8v over spec.

You can reproduce this problem to  use a "type-c to a" cable to connect with NB's type-c port, and "type-c to a" cable' A port is floating, then measure VBUS voltage by voltmeter. 

Hello,

I have been transplanting CCG3PA's CC bootloader to CCG5 recently,  but without an explicit datasheet of the registers, I don't know how to modify the code, such as below:

CCG3PA's PDSS do have a section named "ea_ctrl" while CCG5 doesn't. The datasheet on infineon's website only describes a few features of CCGx, it doesn't provide any information about the registers.

So would you please afford me a datasheet of CCG3PA's and CCG5's registers?

Best regards.

Customer has not standard requirement that VBUS over 20V ( ex :  the SRC_PDO is 5V and 40V )

but as we know the CCG4 integrate VBUS monitor feature , it may be a limiation for VBUS range

Is it possible to achieve this 40V VBUS　function?

if can't, What is the maximum voltage of VBUS?

The application platform is Intel alder lake,

but we don't need to support USB4 and TBT feature, only support DP and USB3 signal.

Can i disable  "Thunderbolt Host Configuration" parameter by  EZ-PD configuration utility because we only need to only support DP and USB3  ( please refer below pic ) ?

if  it is able to disable , Is there anything we should pay special attention to?

if it is not able to  disable, how to setting this "Thunderbolt Host Configuration" parameters ???

Hi,

CYPD4126-40LQXIT IC programming guidelines
Iam using CYPD4126-40LQXIT IC for USB PD. I have few doubts regrading the programming IC.
As of my understanding, ezpdconfigurationutility application is used to program the IC through the I2C Interface and I installed ezpdconfigurationutility application and able to modify the parameters and able to generate cycad file for programming.
But What is the ezpdhostsdk, ezpdpowersdk and what is psoc creater.
where exactly we need to modify the configuration as per my application, how to configure the GPIO Functionality.

How to adjust tDRP and dcSRC.DRP timing by FW ? ( Host SDK )

Hi,

In my design Iam using CYPD4126-40LQXIT IC,  power supply inputs are VDDIO (supply for I/Os)=1V8 , VDDD=3V3.

As per my power sequencing, 1V8  comes first then 3V3 will come and for reset I have connected to 1V8 with RC circuit to meet 1-µs pulse-width requirement. 

My questions are:

• Is there any power sequencing for CYPD4126-40LQXIT IC?
• In 1-µs pulse-width duration, 3V3 supply doesnot come up. Is it okay to release reset?

Please guide us.

@ShifangZ_26, @wang