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SRAM

Anonymous
Not applicable
     The QDRII SRAM has three pairs of clock signals.    
   
     Ø            K, K#: input clocks    
   
     Ø            C, C#: output clocks    
   
           (Note: C and C# clocks are not offered for QDRII+ devices)   
   
     Ø            CQ, CQ#: echo clocks: source-synchronous  output clocks from the SRAM that accompany read data   
   
        
   
           The CQ and CQ# clocks are edge-aligned with read data. For high-frequency applications (>=250MHz), CQ and CQ# clocks are preferred for data capture.   
   
        
   
              
   
     The CQ and CQ# clocks and the data output have the same source. The echo clock is source synchronous and edge aligned with the data. So echo clock tracks data better than the K clock.   
   
        
   
     CQ and CQ# clocks also tracks the data switching noise better than the K clock. This results in better data valid window for the data outputs using CQ/CQ# clocks compared to K clocks.   
   
    

 

   
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