PSoC™ Creator & Designer Forum Discussions
I'm using PSoC creator 4.3
In the Workspace Explorer window, when I create a folder in my source files folder, I would like that folder to also be created where those source files exist on my hard disk. It seems that PSoC creater only creates these folders "virtually" in the project file. Is there an option or method to have PSoC creator maintain these files on disk, as they appear in Workspace Explorer?
Thanks!
Show LessHi,
We installed Psoc Creator 4.4 on a brand new Windows 10 machine. We copied an existing old working PSoC3 project (using the same Keil version C51 compiler: DP8051 9.51).
When building the project we get ther error:
ERROR: C:\Program Files (x86)\Cypress\PSoC Creator\4.4\PSoC Creator\import\keil\pk51\9.51\C51\INC\intrins.h:19: missing ';' before 'extern'
We veriified the build settings between the 2 computer systems (the old one running PSoC Creator 4.2). They are equal.
What causes this error?
Thanks for your reply
Kris
Show LessHello Community,
I am currently evaluating RTC backup time after POR in PSoC6 BLE PIONEER KIT. As mentioned in the schematic there is a supercapacitor connected to VBACKUP for backing up the RTC time(Refer 'CY8CKIT-062-BLE_Kit_Guide' page 33).
I tried flashing the example project '002-16825_CE216825' and '002-18964_CE218964' .
In both the projects, the time is ticking when the kit in on condition. But after a POR the previous time is not retained by the RTC like mentioned in the TRM/datasheet.
Kindly, help to resolve this issue ASAP. As in our design the decision to add an additional IC to retain the time or not totally depend on this.
Show LessI have 7 calls to an external function within one source file. ONLY FOUR generate this error. I have tried copying one of the "good ones" over the bad ones.. no change.
I tried putting an extern.. line for the external function just above the function calls. No change.
I commented out these 4 lines to verify: I am not out of flash, and I am not out of RAM.
Help!
Show LessHi all, since I started using a new computer PSoC Creator is extremely slow to boot: it can take up to 10 minutes... I have the splash screen and nothing else. Same with PSoC Programmer.
I re-installed without a change, tried 4.2, 4.3 and 4.4. All the same.
Have you seen this?
Show LessI am using the psoc6 and trying to debug a function in the m4 core. When I enter a function that has a 2K byte array the stepping takes about 10 seconds. I read some other post here that show this happens if you have a watch window open but all my watch/memory windows are closed. If I make the array global everything works fine.
I am new to cypress tools and keep thinking there must be some other type of memory window still open but I can't find it. What else could it be?
Thanks
David
Show LessI'm using PSoC creator 4.3 and PDL 3.1.3
I created an SPI block as a master (see screen shot). There are two slave devices, one is write-only and a data width of 9 bits. The other is read-only and has a data width of 11 bits.
According to the UDB editor, if the Tx and Rx data widths are not the same, you have to use the "National Semiconductor" sub mode.
I selected "National Semiconductor" and it built fine. However, when I run the code, during SPI initialization there is an exception generated by an ASSERT which checks if "National Semiconductor" mode is selected when the Tx/Rx sizes are different. I found that the reason for this assertion is that for some reason, the generated SPI config code does NOT set sub-mode to "CY_SCB_SPI_NATIONAL", but instead uses "CY_SCB_SPI_TI_COINCIDES". (see code snippet below)
I'd like to know if this is a bug, or if I am doing something wrong.
cy_stc_scb_spi_config_t const SPI_DISPLAY_config =
{
.spiMode = CY_SCB_SPI_MASTER,
.subMode = CY_SCB_SPI_TI_COINCIDES,
.sclkMode = CY_SCB_SPI_CPHA0_CPOL0,
.oversample = 16UL,
.rxDataWidth = 11UL,
.txDataWidth = 9UL,
.enableMsbFirst = true,
.enableInputFilter = false,
.enableFreeRunSclk = false,
.enableMisoLateSample = false,
.enableTransferSeperation = false,
.ssPolarity = ((((uint32_t) CY_SCB_SPI_ACTIVE_LOW) << SPI_DISPLAY_SPI_SLAVE_SELECT0) | \
(((uint32_t) CY_SCB_SPI_ACTIVE_LOW) << SPI_DISPLAY_SPI_SLAVE_SELECT1) | \
(((uint32_t) CY_SCB_SPI_ACTIVE_LOW) << SPI_DISPLAY_SPI_SLAVE_SELECT2) | \
(((uint32_t) CY_SCB_SPI_ACTIVE_LOW) << SPI_DISPLAY_SPI_SLAVE_SELECT3)),
.enableWakeFromSleep = false,
.rxFifoTriggerLevel = 0UL,
.rxFifoIntEnableMask = 0x0UL,
.txFifoTriggerLevel = 0UL,
.txFifoIntEnableMask = 0x0UL,
.masterSlaveIntEnableMask = 0x0UL
};
Show LessI have a question regarding the following issue.
I have opened a project from an existing folder/directory. I am seeing the following two issues and saw the suggestion to reach out to customer support as shown in the screenshot below:
- Cannot find CapSense component.
Here is the screenshot of the schematic
Here is the screenshot of the error in Output window:
Please let me know how to resolve these issues so that I can build my project and debug.
Looking forward to your response.
Thank you,
Arshiya Tabassum !PSoC Creator
Show LessHello,
Does anyone know if there are published system requirements for PSOC programmer such as OS and cpu/memory? I just need it for documentation purposes but have not really found anything in Cypress' documentation.
Show LessHello,
I'm using sw CySmart 1.3 and I often restart it. Each time I have to make the same settings according to my needs, and I don't see the option of saving the Master Settings. Is there such a thing? Maybe it is obvious, but for me not
Show Less