PSoC™ 6 Forum Discussions
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hi, while building the project am getting following error.
make[1]: *** [../mtb_shared/core-make/release-v3.0.3/make/core/build.mk:435: C:/DemoProject/build/CY8C6245LQI/Release/AIController-Psoc6.elf] Error 1
make: *** [../mtb_shared/core-make/release-v3.0.3/make/core/main.mk:376: secondstage_build] Error 2
I tried reinstalling the Modustoolbox, also corrected the path of Environment variable, but nothing seems to be working.
Show LessHello!
Details of the project layout:
In my project I am using PSoC 6: CY8C62xA, and in the flash memory I store 2 identical images (1MB each in size). That enables me to upgrade image easier and switch between them. I use RTOS on the CM4 core, and CM0p is baremetal.
Plan:
I wanted to place an application bootloader at the beginning of the image to handle some additional logic and in future use it to enable the rest of the application to be position independent code. That application bootloader would still be in flash and start where normally the image would at the beginning. I modified linker to shift the application image by the size of the bootloader and added the jump logic from bootloader to an application:
1. dissabling IRQs and clearing pending ones
2. dissabling all enabled interrupts in NVIC
3. dissabling all enabled peripherals that might generate interrupt
4. dissabling SysTick and its exception pending bit
5. properly excuting__set_MSP, __set_CONTROL, and __set_PSP functions
6. jumping to application using function pointer and going directly to Vtable address of cm0p core
This will jump to the CM0p code of the application where Cy_SysEnableCM4(m4_addr) will start the cm4 core as well. RTOS tasks will run with no issues, everything works correctly except adc.
Problem:
I narrowed down the problem to cyhal_adc_read() funciton on cm4 side of the application. Adc init is fine, but the program stops when trying to execute this function. The interrupt is not starting, but I am not sure if the adc interrupt or IPC one is messed up.
When I halt the CPU, I can see through JLink that there is no hard fault and PC is not stuck at one place. When checking the map, everything is okay, vector table is where it should be.
I checked the map, everything is okay, vector table is where it should be, it is filled correctly.
Does anyone have any ideas what to look for, what could be wrong?
Please let me know if you have some questions or if I need to provide more details.
Thank you!
Show LessInfo : Could not connect to device: MiniProg4/PSoC 61/62/63
Info : Open On-Chip Debugger 0.11.0+dev-4.4.0.2134 (2022-09-08-13:07)
Info : Licensed under GNU GPL v2
Info : For bug reports, read
Info : http://openocd.org/doc/doxygen/bugs.html
Info : DEPRECATED! use 'adapter speed' not 'adapter_khz'
Info : adapter speed: 1000 kHz
Info : adapter speed: 1500 kHz
Info : adapter speed: 1500 kHz
Info : >> do kp3 acquire
Info : Using CMSIS-DAPv2 interface with VID:PID=0x04b4:0xf151, serial=180F031D03201400
Info : CMSIS-DAP: SWD supported
Info : CMSIS-DAP: JTAG supported
Info : CMSIS-DAP: Atomic commands supported
Info : CMSIS-DAP: FW Version = 2.0.0
Info : CMSIS-DAP: Interface Initialised (SWD)
Info : SWCLK/TCK = 1 SWDIO/TMS = 1 TDI = 0 TDO = 0 nTRST = 0 nRESET = 1
Info : CMSIS-DAP: Interface ready
Info : KitProg3: FW version: 2.40.1241
Info : KitProg3: Pipelined transfers enabled
Info : KitProg3: Asynchronous USB transfers enabled
Info : VTarget = 3.319 V
Info : kitprog3: acquiring the device (mode: reset)...
Error: kitprog3: failed to acquire the device
Info : clock speed 1500 kHz
Error: Error connecting DP: cannot read IDR
Error: Error connecting DP: cannot read IDR
Error: Error connecting DP: cannot read IDR
Error: DAP 'test.cpu' initialization failed (check connection, power, transport, DAP is enabled etc.)
Info : Disconnected - MiniProg4 CMSIS-DAP BULK-180F031D03201400 FW Version 2.40.1241
I am getting above error while programming CY8C6245LQI-S3D42 using miniprog-4. There are 2 boards giving same problem. These boards were programmed earlier. Also the programmer setup is confirmed working using another board.
Can anyone help to resolve this issue?
Show LessI am attempting to follow the "Secure Boot" SDK user guide but continually run into the same problem. When attempting to setup the "CySecureTools" workspace i get the same error 'bash: cysecuretools: command not found' i get this even though i installed it and when i attempt to reinstall cysecuretools i got the message stating command already satisfied. This is all done on Windows.
Show LessHi
I am studying the Device Firmware Upgrade code
I can change the code and make it run the FW upgrade via UART by modifying the common.mk,
and I noted the differences when I used the original sample with the I2C interface, when the upgrade process is done, the PSoC6 cam restart/reboot. and running the cm4 code
but when I changed the interface to UART. it seems to upgrade successfully, but the EVK doesn't reboot
is there anything else I need to change besides the
TRANSPORT_OPT?=UART
please advise
Thanks
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Hi,
I am using CY8C6245LQI-S3D42 and I used the DFU examples to boot the system and created the application to run on AM4 core and everything is working well.
I wait for 5 sec in DFU to check if there is any updates or just move with the Application code.
I find that sometimes the device stops booting once in a blue moon. Now If I flash again just the boot loader, everything is fine , I need not have to write the Application, it moves from DFU in 5 sec to application.
I believe, there is some how the flash/DFU is getting corrupted. I want to protect this scenario. Can some one share how do I protect my DFU so that it never erases . Any example's will be appreciable, I am using USB CDC transport in DFU.
Regards,
Madhav
Show LessHello,
I'm running MTB 3.2 GUI in Ubuntu 22.04.4 LTS and building the Security_App PSoC6 example for the Prototyping Kit (CY8CPROTO-062-4343W).
After creating the default Security_App example, I added the emeeprom (v2.20.0) component, so as to read/write settings to the PSoC6 32kB Auxilliary Flash. I copied the code from Emeeprom's README.md
And added a line CY_SECTION(".cy_em_eeprom") , so that emEepromStorage will be kept in the 32kB Auxilliary Flash.
However, the code failed to compile:
/opt/Tools/ModusToolbox/tools_3.2/cymcuelftool-1.0/bin/cymcuelftool --merge ../proj_cm0p/build/APP_CY8CPROTO-062-4343W/Debug/proj_cm0p.elf ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/proj_cm4.elf --output ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app.elf --hex ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app.hex; cp -f ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app.hex ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app_BOOT_raw.hex; rm -f ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app.hex; /opt/Tools/ModusToolbox/tools_3.2/gcc/bin/arm-none-eabi-objcopy --change-addresses=0 -O ihex ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app.elf ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app_BOOT_unsigned.hex; ../../mtb_shared/core-make/release-v3.3.1/make/scripts/python3.bash ../../mtb_shared/mcuboot/v1.8.1-cypress/scripts/imgtool.py sign --header-size 0x400 --pad-header --align 8 -v 1.0.0 -S 917504 -M 1792 --overwrite-only -R 0 -k ../proj_btldr_cm0p/keys/cypress-test-ec-p256.pem ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app_BOOT_unsigned.hex ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app.hex; cp -f ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app.hex ./build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app_BOOT.hex;
No ELF section .cychecksum found, creating one
Application checksum calculated and stored in ELF section .cychecksum
No ELF section .cymeta found, creating one
Checksum calculated and stored in ELF section .cymeta
Usage: imgtool.py sign [OPTIONS] INFILE OUTFILE
Try 'imgtool.py sign -h' for help.
Error: Image size (0x3fe0896) + trailer (0x20) exceeds requested size 0xe0000
make[1]: Leaving directory '/home/ub2204/work/psoc/tansiowk_mtw_3_1/Security_App_Emeeprom/proj_cm4'
cp: cannot stat './build/BOOT/APP_CY8CPROTO-062-4343W/Debug/primary_app.hex': No such file or directory
make[2]: *** [../../mtb_shared/core-make/release-v3.3.1/make/core/bwc.mk:161: _mtb_build__legacy_project_postbuild] Error 1
make[1]: *** [../../mtb_shared/core-make/release-v3.3.1/make/core/main.mk:385: secondstage_build] Error 2
make: *** [/opt/Tools/ModusToolbox/tools_3.2/make/application.mk:72: build] Error 2
"/opt/Tools/ModusToolbox/tools_3.2/modus-shell/bin/make CY_MAKE_IDE=eclipse CY_IDE_TOOLS_DIR=/opt/Tools/ModusToolbox/tools_3.2 CY_IDE_BT_TOOLS_DIR= -j6 all" terminated with exit code 2. Build might be incomplete.
I have attached the code, build error log and map file.
Thanks for any advice!
BR,
SK
Show LessHello,
As a result of the difficulties of ModusToolbox i have been attempting to use the Mbed Studio with the PSoC64 Wi-Fi BT Secure Boot Pioneer kit. I have been able to build the given program 'mbed-os-example-blinky' as well as debug it. However it is not not working as anticipated. I believe the LED is not mapped to the correct GPIO pin on the board. Does anyone know how to do this?
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Dear forum:
I write hex file to flash by cypress programmer.
I can write the hex file normally, but when I open the cypress programmer,
but why the Chip protection is UNKNOWN?
Thank you.
Comment: My soft don't touch the eFuse address.
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