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PSoC™ 5, 3 & 1 Forum Discussions

roboteux
PSoC™ 5, 3 & 1
Hi,   This schematic is giving me a warning : setup time violation found in a path from clock (cyBus_CLK) to filter_clock If I had a sync buffer I do... Show More
settinger
PSoC™ 5, 3 & 1
Hi all, I'm struggling to open and build a PSoC Creator project from 2017. I've seen one person remark that they were able to get it to build, but I g... Show More
yaga_3967241
PSoC™ 5, 3 & 1
Hello, We are using LP5. In any case, when we load new FW via wither bootloader or programmer, will any EEPROM be changed? I have not seen that but so... Show More
roboteux
PSoC™ 5, 3 & 1
Hi, on PSOC5LP with pcoc creator 4.4 in the source code for the ADC SAR there is : ADC_SAR_1.h #define ADC_SAR_1_IRQ_REMOVE (0u) /* Removes internal i... Show More
MaTr_1730276
PSoC™ 5, 3 & 1
PSoC 5LP DMA
solved msg Solved
Hi, I would want to know if it's possible to use a DMA only to reset a variable in my C code. The DMA has to reset a variable when it receives a hardw... Show More
Eugenio966
PSoC™ 5, 3 & 1
Hello,   does anyone know the difference between these to device family? They seem very similar from datasheet.   Br Eugenio Show More
ejohansen
PSoC™ 5, 3 & 1
We have a batch of boards where one ADC channel is reading a few hundred higher counts higher than it should be. This signal is connected to one of se... Show More
EfiGolan57
PSoC™ 5, 3 & 1
Hi All,  My customer is asking bout the reason for the Rpulldown resistor big range (min 3.5K - 8.5K at max), I have review the spec, and I believe th... Show More
JeJa_2249041
PSoC™ 5, 3 & 1
I'm using the CY8C20524-12PVXI with the intention of controlling a display with a rotary encoder. It seems that when I run the application, the Interr... Show More
T_Mura
PSoC™ 5, 3 & 1
I started PSoCProgrammer and supplied power to the target board, but the method is unknown.PSoC Creator has a settings menu so it works fine.Please te... Show More
Forum Information

PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.