PSoC™ 5, 3 & 1 Forum Discussions

Hi

I'm be trying go get an audio signal from my PC using USB and to filter it out to a speaker.

I did this project and didn't figure out how to configue the filter (input, output, dma intetput)

I use the usb_audio example, after change it to my speaker, and try it, I try add filter before VDAC8, but I didn't know how to configure well the Filter

I attach the project.

I would like to know how to connect it.

Please help me!

Thanks

Hello All,

I was interested in understanding PSoC low power modes, so I searched the Cypress website and found AN77900 http://www.cypress.com/?rID=64554

I downloaded the example projects and was able to get them to work on the CY8CKIT-050. However, I then wanted to create my own project. The first thing I tried was puting the PSoC to sleep using a button, and then waking it up using that same button. This example is in the AN77900 project.

In my program, the PSoC seems to go to sleep, but it does not wakeup.

Here is the function that puts the PSoC to sleep and wakes it up:

void CustomSleep()
{
    /* Display mode. */
    LCD_Position(1,0);
    LCD_PrintString("Sleep-PICU      ");
   
    /* Start the button interrupt. */
    isr_ButtonPress_Start();
   
    /* Prepare for Sleep and enter it. */
    IDAC8_1_Sleep();
    CyPmSaveClocks();
    CyPmSleep(PM_SLEEP_TIME_NONE, PM_SLEEP_SRC_PICU);
   
    /* The PSoC wakes up here. Clear wakeup interrupts. */
    CyPmRestoreClocks();
    IDAC8_1_Wakeup();
   
    /* Stop the button interrupt. */
    isr_ButtonPress_Stop();
    Button_ClearInterrupt();
   
    LCD_Position(1,0);
    LCD_PrintString("Wakey-PICU");
   
    ButtonDebounce();
}

I think I set up the button and ISR the same as the example, but I seem to have missed something. Any ideas?

 Hi,

I did some work on a circuit board to convert a load cell output (0-15mV) into a force that is transmitted to a PC.  The software worked fine, and then I lost it, and recreated it.  Now nothing seems to work.  There are a few things that stick out:

-The load ADC does not read accurately at all, and bounces around a lot.  If I set it up as it is in the file, it reads off when given a 10mV signal.  It reads off about 40%, and bounces around.  If I set it up as a level shift buffer in order to maximize the resolution it actually reads negative.

-There is an error by my first interrupt handler that I do not understand.

-A lot of the 'smart completion' selections are missing entirely.  I try to type 'UART_PutString' and it never appears under the smart completion options.

Any ideas are greatly appreciated.

Thank you,

Tom

 Hi,

in our project we are using a self developed core using some datapaths. FIFO is disabled through AUX registers (CLR bits are set) to minimze delay.

Will the content of F0/F1 be overwritten with rising signal on f0/f1_load, even if the content wasn't read before? Again: FIFO is in single buffer (= register/latch?) mode.

From my obersavtion I have to first read F0/F1, than the UDB can write a new actual value. Is this correct?

Reagards,

Franz

Hi,

I wanted to share an issue I had when trying to communicate with a New Haven LCD.

It is a 2x20 character LCD with 4-bit data interface.

I dragged and dropped a Char_LCD component to my design and compiled to generate the  LCD.h and LCD.c (the name of my component).

the issue I had was the inhability to print a string on either the first or second line if it was longer than 7 or 8 characters.

I performed several tests and analyze the code to figure out that there's a DO-WHILE in the function LCD_IsReady().

So far, this function waits for the bit 4 is not 0. I commented the DO and the WHILE but I let the code between the brackets uncommented.

Now, everything is working fine. I posted the code below if it can help anyone.

in http://www.cypress.com/?docID=44199 on page 7 it describes a method of power saving by sleeping the device. I have a device that takes sensor data every secound and outputs it and am wondering how to achieve this.

Hi

I use application AN2284 to create notch filter 50Hz. In this app is C code

IIR second-order notch filter:

diff1 = (x + xn_2) <<16;
y = ((diff1>>1)+(diff1>>2)+87301*(xn_1 - yn_1) -((yn_2<<16)>>1));
xn_2 = xn_1;
xn_1 = x;
yn_2 = yn_1;
yn_1 = y;

I know IIR filters but I don't understand where it came from value 87301 ?

I thought that the filter is formed from the coefficients. for example. b=-2*cos(2*PI*f)

I would be grateful someone explain how it works.

I'm using PSOC Creator 2.2, SPI_Slave_v2_50, targeting a CY8C5868AXI-LP032.

I can't seem to get the SPI slave to work at all.  I have confirmed all three incoming signals from a different processor, these signals being ss, sclk, and mosi.  So I know that those signals are getting inside the PSOC, with a clock rate of roughly 96kHz. However, I can't seem to get any response out of the SPI slave component, as measured on the rx_interrupt output in multiple ways.

I've attached images of my TopDesign and the three configuration tabs for the SPI slave.  I've also pasted the relevant source code below, taken largely from the Cypress example.  The entry point is init_spis_psoc() near the bottom.  

In the recent past, I routed each of the three incoming signals (ss, sclk, mosi) directly to one of my LED output pins.  I confirmed with a scope that the LED was blinking exactly as the measured SPI signal being generated by a different processor.  However, I don't see the result from the dma.  I don't see an interrupt happening, whether it was at the moment configured to blink an LED or if I set a breakproint with the debugger.  I made sure to call my ISR from inside the automatically generated ...ISR.c files  And most recently I don't see an LED output in response to interrupts occurring, having routed the interrupt outputs directly to my LED pins.  I've tentatively enabled all external interrupt types.  I've set the bit rate to 1000 kHz, ten times faster than the actual sclk, and I've set to internal clock to be sure.  The SPI slave just seems totally dead.

What am I possibly doing wrong?

  #ifdef DO_SPIS_PSOC

/* DMA Configuration for DMA_TX_S */

#define DMA_TX_S_BYTES_PER_BURST       (1u)

#define DMA_TX_S_REQUEST_PER_BURST     (1u)

#define DMA_TX_S_SRC_BASE              (CYDEV_SRAM_BASE)

#define DMA_TX_S_DST_BASE              (CYDEV_PERIPH_BASE)

/* DMA Configuration for DMA_RX_S */

#define DMA_RX_S_BYTES_PER_BURST       (1u)

#define DMA_RX_S_REQUEST_PER_BURST     (1u)

#define DMA_RX_S_SRC_BASE              (CYDEV_PERIPH_BASE)

#define DMA_RX_S_DST_BASE              (CYDEV_SRAM_BASE)

/* Variable declarations for DMA_Tx_S */

uint8 S_TxChannel;

uint8 S_TxTD[2u];

/* Variable declarations for DMA_Rx_S */

uint8 S_RxChannel;

uint8 S_RxTD[2u];

#define TX_TD_SIZE   128

#define RX_TD_SIZE   128

uint8 s_txBuffer[TX_TD_SIZE];

uint8 s_rxBuffer[RX_TD_SIZE];

/*******************************************************************************

* Function Name: Dma_M_Tx_Configuration

********************************************************************************

* Summary:

*  Configures the DMA transfer for TX direction

*   

* Parameters:

*  None.

*

* Return:

*  None.

*

*******************************************************************************/

void Dma_S_Tx_Configuration()

{

cystatus status;

   /* Init DMA, 1 byte bursts, each burst requires a request */ 

   S_TxChannel = DMA_TX_S_DmaInitialize(DMA_TX_S_BYTES_PER_BURST, DMA_TX_S_REQUEST_PER_BURST, 

                                       HI16(DMA_TX_S_SRC_BASE), HI16(DMA_TX_S_DST_BASE));

   S_TxTD[0u] = CyDmaTdAllocate();

   S_TxTD[1u] = CyDmaTdAllocate();

   /* Configure this Td chain as follows:

   *  - The TD is looping on itself

   *  - Increment the source address, but not the destination address   

   */

   status = CyDmaTdSetConfiguration(S_TxTD[0u], 7u, S_TxTD[1u], TD_INC_SRC_ADR);

if (CYRET_SUCCESS != status) goto FAIL_Dma_S_Tx_Configuration;

   status = CyDmaTdSetConfiguration(S_TxTD[1u], 1u, S_TxTD[1u], 0u);

if (CYRET_SUCCESS != status) goto FAIL_Dma_S_Tx_Configuration;

   /* From the memory to the SPIS */

   #if(CY_PSOC3_ES2 || CY_PSOC5_ES1)

       status = CyDmaTdSetAddress(S_TxTD[0u], LO16((uint32)s_txBuffer), LO16((uint32)SPIS_PSOC_BSPIS_es2_SPISlave_sR8_DpMISO_u0__F0_REG));

if (CYRET_SUCCESS != status) goto FAIL_Dma_S_Tx_Configuration;

   #else

       status = CyDmaTdSetAddress(S_TxTD[0u], LO16((uint32)s_txBuffer), LO16((uint32)SPIS_PSOC_BSPIS_es3_SPISlave_sR8_Dp_u0__F0_REG));

if (CYRET_SUCCESS != status) goto FAIL_Dma_S_Tx_Configuration;

   #endif    

   status = CyDmaTdSetAddress(S_TxTD[1u], LO16((uint32)s_txBuffer), LO16((uint32)s_txBuffer));

if (CYRET_SUCCESS != status) goto FAIL_Dma_S_Tx_Configuration;

   /* Associate the TD with the channel */

   status = CyDmaChSetInitialTd(S_TxChannel, S_TxTD[0u]);

if (CYRET_SUCCESS != status) goto FAIL_Dma_S_Tx_Configuration;

return;

FAIL_Dma_S_Tx_Configuration:

UART_UPSTRM_PutString("SPIS_PSOC Dma_S_Tx_Configuration FAILED\r\n");

}    

/*******************************************************************************

* Function Name: Dma_S_Rx_Configuration

********************************************************************************

* Summary:

*  Configures the DMA transfer for RX direction

*   

* Parameters:

*  None.

*

* Return:

*  None.

*

*******************************************************************************/

void Dma_S_Rx_Configuration()

{ 

cystatus status;

   /* Init DMA, 1 byte bursts, each burst requires a request */ 

   S_RxChannel = DMA_RX_S_DmaInitialize(DMA_RX_S_BYTES_PER_BURST, DMA_RX_S_REQUEST_PER_BURST,

                                    HI16(DMA_RX_S_SRC_BASE), HI16(DMA_RX_S_DST_BASE));

   S_RxTD[0u] = CyDmaTdAllocate();

   S_RxTD[1u] = CyDmaTdAllocate();

   /* Configure this Td as follows:

   *  - The TD is looping on itself

   *  - Increment the destination address, but not the source address

   */

   status = CyDmaTdSetConfiguration(S_RxTD[0u], 8u, S_RxTD[1u], TD_INC_DST_ADR);

if (CYRET_SUCCESS != status) goto FAIL_Dma_S_Rx_Configuration;

   status = CyDmaTdSetConfiguration(S_RxTD[1u], 1u, S_RxTD[1u], 0u);

if (CYRET_SUCCESS != status) goto FAIL_Dma_S_Rx_Configuration;

   /* From the SPIS to the memory */

   #if(CY_PSOC3_ES2 || CY_PSOC5_ES1)

       status = CyDmaTdSetAddress(S_RxTD[0u], LO16((uint32)SPIS_PSOC_BSPIS_es2_SPISlave_sR8_DpMOSI_u0__F0_REG), LO16((uint32)s_rxBuffer));

if (CYRET_SUCCESS != status) goto FAIL_Dma_S_Rx_Configuration;

   #else

    status = CyDmaTdSetAddress(S_RxTD[0u], LO16((uint32)SPIS_PSOC_BSPIS_es3_SPISlave_sR8_Dp_u0__F1_REG), LO16((uint32)s_rxBuffer));

if (CYRET_SUCCESS != status) goto FAIL_Dma_S_Rx_Configuration;

   #endif

   status = CyDmaTdSetAddress(S_RxTD[1u], LO16((uint32)s_rxBuffer), LO16((uint32)s_rxBuffer));

if (CYRET_SUCCESS != status) goto FAIL_Dma_S_Rx_Configuration;

   /* Associate the TD with the channel */

   status = CyDmaChSetInitialTd(S_RxChannel, S_RxTD[0u]);

if (CYRET_SUCCESS != status) goto FAIL_Dma_S_Rx_Configuration;

return;

FAIL_Dma_S_Rx_Configuration:

UART_UPSTRM_PutString("SPIS_PSOC Dma_S_Rx_Configuration FAILED\r\n");

}

void SPIS_PSOC_RX_ISR(void)

{

ToggleDebugA(); // Toggle RED LED

SPIS_PSOC_RX_ISR_ClearPending();

}

void SPIS_PSOC_TX_ISR(void)

{

ToggleDebugA(); // Toggle RED LED

SPIS_PSOC_TX_ISR_ClearPending();

}

void init_spis_psoc()

{

PSOC_SPI_MISO_PIN_SetDriveMode(PSOC_SPI_MISO_PIN_DM_STRONG); // Make strong output

PSOC_SPI_MOSI_PIN_SetDriveMode(PSOC_SPI_MOSI_PIN_DM_DIG_HIZ);

PSOC_SPI_CLK_SetDriveMode(PSOC_SPI_CLK_DM_DIG_HIZ);

nCS_PSOC_PIN_SetDriveMode(nCS_PSOC_PIN_DM_DIG_HIZ);

SPIS_PSOC_RX_ISR_Start();

SPIS_PSOC_TX_ISR_Start();

Dma_S_Tx_Configuration();

   Dma_S_Rx_Configuration();

   CyDmaChEnable(S_TxChannel, 1u);

   CyDmaChEnable(S_RxChannel, 1u);

SPIS_PSOC_Start();

UART_UPSTRM_PutString("SPIS_PSOC initialized\r\n");

}

#endif