PSoC™ 5, 3 & 1 Forum Discussions

Hi,

Currently am working with the IC CY8C20666A using PSoc Desinger5.4.

I what to know the statement for  open a file ​ in the system (from any drive) in the coding.

Thanking you..

Hi,

I am looking for advise on of-topic subject, hoping for vast experience of forum users. 

I am looking for a solution to match two packages: a driver board and LED package by installing some ID chip into LED package. So before turning on, the driver board can check that it has matched LED attached. It would be nice if some extra ~64 bytes of information could be stored it such memory, such as driving voltage, current, etc., and package size would be small as possible, maybe bodyless, with 3 legs or less (power, 1-wire/SPI and GND).

Thank you,

odissey1

Hello,

I need to use some OPs and I'm not sure what kind of input I need now. Regarding to the colors of the OP-pin, I need an analog pin. But is this a hardwareconnection or not? Otherwise I thought about using a digital input pin with hardwareconnection enabled. If it is a real hardwareconnection, there shouldn't be any difference.

Seems to be an easy question but I'm a little bit stuck here.

Best regards

Hi,

I made some projects with PSoC 4 and now I'm playing around with my recently received CY8CKIT-059. One of the things I want to try out is the EMIF in asynchronous mode. Since the datasheets, user manuals etc all use different timing diagrams for the control signals, I decided to measure them in relation to the EMIF clock and used a clock component which is based on the bus clock (and therefore is the same as EMIF clock). So it's not a new clock signal, it already exists. The corresponding pin is configured as push-pull.

Now, the problem is I can only see a clock signal if the clock is a new one, not the derived one. With BusClk I can only see some veeeery small spikes. Is this expected behavior or a bug? In the clock component datasheet, I couldn't find anything which doesn't allow to output a 'existing' clock on a port pin. I'm using PSoC Creator 3.2.

Regards,

Ralf

I'm sure there's a forum post about this already. However, whenever I Google this the links always take me to the cypress homepage, rather than the forum post.

I'm using the CY8CKIT-042-BLE and PSOC 3.1. When I go to select debug target, I'm greeted with "Port Aqcuire Failed". I have checked the cable and closed any application that may use the port.

Hello,

I'm wondering, if it would be possible, to place capsense-buttons on a flex PCB. The design guide mentions a max. track length of 50mm for flex cable. Is this still correct, if the top-layer would contain the buttons and the bottom-layer would contain hatched ground and button-signal-tracks? Would this be possible? The complete max. track length would be 5cm on flex-PCB + 2cm flex-cable + 7cm on FR4-PCB.

Or do you have better suggestions for creating a keypad connected to a PCB for controlling the rest of the device?

Best regards.

I'm working on a bootloader.  I'm following the recommended communications flow found in multiple application notes.  I'm able to program most of the flash rows until I get to arrayID = 0x40.  The GET_FLASH_SIZE command returns a start and end row of 23 and 255 for this arrayID but the .cyacd file indicates row 0 should be programmed.  Is there something special about arrayID = 0x40?

Here's a snippet from my cyacd file:

:0000EC01200000000008000000000000000000000000000000090000000000000000000000000000000A0000000000000000000000000000000B0000000000000000000000000000000C0000000000000000000000000000000D0000000000000000000000000000000E0000000000000000000000000000000F000000000000000000000000000000F8B500BFF8BC08BC9E4670473D19000081340000F8B500BFF8BC08BC9E46704719190000B8EC000008C1FF1FF0000000E0390000000000000C005A00145300000C005A00F85000000C005A00C04C00000C005A00A44A00000C005A00DC4E00002A005A006A9300000100000038C2FF1FFF0000002A005A002EA2000000000000000000000000000000000000000000000000000000000000000000000A
:0000ED01202A005A0018C700002A005A00F2B000002A005A00447D00002A005A00925C00002A005A007ACE00002A005A0054B800002A005A00A68400002A005A00F46300002A005A00CC9A00002A005A00B6BF00002A005A0090A900002A005A00E27500002A005A00305500002A005A00088C00003C005A00DCD500003C005A00566B00003C005A0068E000007F800000010000000000E880D0010100420000008014EF03FF00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B4
:0100FF0120000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AA111900001800000000D5000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001D
:4000000010020100010000FF01020304050607080980
:40000100100A0B0C0D0E0F10111213141516171805AB
:400002001003FF0100FFFFFFFFFFFFFF0100FF0100B1
:40000300100005FFFFFFFFFFFFFFFFFFFFFFFFFFFFB6

The first 2 rows are arrayID = 0. The next row has arrayID = 1.  My bootloader works fine up to this point.  The fourth line starts arrayID = 0x40.  My bootloader breaks here,