PSoC™ 5, 3 & 1 Forum Discussions

 What is the input imedance of the v2.0 comparator module? I've been seeing some errorenous readings when I am using a voltage divider into the comparator. The divider is on the order of 50kohms.

 Ultrasonic parking assistance (UPA) systems are increasingly popular in cars because they enhance safety and driver convenience, especially in large cities. This application note shows you how to create an ultrasonic distance measurement system using enclosed ultrasonic transducers, which are typical in automotive applications.

http://www.cypress.com/?docID=42341

 Dear all,

Now i have a project,following the process:1.WaveDAC8 can generate the sine wave.2.The output of  WaveDAC8 is the input of a ADC.3.Sending the ADC output to the filter by the DMA.4.I store the filter output datas into SRAM and display them on LCD.

But i can not get the sine wave datas on LCD which generated by WaveDAC8.You can download the project and test it.Now i want to debug it ,but the obvious phenomenon i can see maybe is the data stored into the sram.Dose any other ways i can find the errors? Thanks!

Hi every one.!

I'm tryinng to adapt source code from EZRadioPro from Silicon Lab.  I want to develop code right through PSoC 3 for radio tranceiver module RFM22B,( from HopeRF) which include si4430 chip.

 I have alrready developed code for bidirectional link with ACK and work OK with PSoc 3.

Now I would like one more step and I would like FHSS modulation( frecuency hopping spread spectrum) , so I can get better answer due to signal multifading .

Thera are some code from Silicon lab , but  they use   SDCC  and  compiler_defs.h. There are for some global variable declaration such as :      

" # define SEGMENT_VARIABLE(name, vartype, locsegment) vartype locsegment name "

My issue is  that I don't known how use the equivalent declaration in PSoc 3 .

I don't want to copy the code, only I want to understand what does this declartion mean.

For reference I will paste here a link to take a look  what compiler_defs.h does.

http://www.keil.com/dd/docs/c51/cygnal/compiler_defs.h

I hope someone can tell me how use this declaration on PSoC 3

Thank you very much in advance.

 I would like to set up google's protocol buffers on my PSoC board so I can send the compressed data to a python script for interpreation. I was curious if anyone else has already done this or something similar. Any help or suggestions are welcome. Let me know if there is more specific information you want.

 Hi,

I want to use two PSOC1 chips which will operate at same frequency and their clocks near to perfect phase aligned.

Can you please suggest feasible options to achieve this?

Thanks

Hi all,
I'm looking for some memory optimization.
at one stage I build my project and it shows my memory mapping as

Program Size: data=22.0 xdata=3506 const=5803 code=16419
ERROR: L107: ADDRESS SPACE OVERFLOW CONST ?CO?MAIN 0000BEH
ERROR: L120: CONTENT BELONGS TO ERRONEOUS SEGMENT ?CO?MAIN

Now if I remove few lines from my code it reduces 18 BYTES as
Program Size: data=22.0 xdata=3506 const=5803 code=16401
Flash used: 22204 of 32768 bytes (67.8 %).
SRAM used: 3506 of 4096 bytes (85.6 %).
It means no change in memory other than code memory so why the error is overflow from const memory.
and if we consider about code memory then yet 10546 BYTES are free to use.
Is there any relation with no. of components used in topdesign and the flash memory we can use.

 Hi there,

I have built an envelope extraction processor with PSOC 5LP. Overall it is working, but the rectification is not a full rectification, and the envelope is usable but not very neat.

The design was a rectifier followed by a low pass filter, as shown in the attachment. 

The rectifier was based on an old technical note. Found it in EE times archive. Both on-board voltages were set to 5V. The comparator was comparing the input signal to VDD/2 (reference signal) which yield either a positve or a negative unity gain depending on the level of input signal as compared to that of the reference. A mixer they multiply the output of comparator to the input signal, so the negative waveforms are automatically assigned a gain of -1, and flip to the positive side.

The reference of VDD/2 was made up of a op-amp based follower.

The low-pass filter was a rather simple design based on an interanl op-amp.

The main.c only include start instructions for the components involved.

The output waveform of the rectifier was as if the negative side was not flipping over as the nice chart shown in the technical note. Rather, the negatives were still negatives, only the amplitude was a lot smaller. I would post the shape as soon as my oscilliscope is functioning again.

My questions are:

1. Is the old rectifier design supposed to work on PSOC 5LP? Is there anything altogether wrong with the way I am doing it?

2. The note said the output of comparator would be -1 if the input is lower than the reference. May it be zero instead? Is there a parameter of the comp block  for this?

3. Are there alternative ways of getting the envelope with PSOC 5LP?

Thanks!