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PSoC™ 5, 3 & 1 Forum Discussions

Anonymous
PSoC™ 5, 3 & 1
Hi, I would like to know how to display the menu bar of psoc designer 5.4. Accidentally delete it and can't appear. I tried uninstalling and installin... Show More
Anonymous
PSoC™ 5, 3 & 1
Hello !     ( First of all, sorry for my middle english 😕 )    Can somebody help me in my project please ?     I've already made a tactile button (wi... Show More
Anonymous
PSoC™ 5, 3 & 1
Hi,         I want to create a thread in PSOC CY8KIT-059. i  linux we use pthread to create a thread but herei do  not  how to create thread in psoc. ... Show More
Anonymous
PSoC™ 5, 3 & 1
SPI RX Buffer
solved msg Solved
Hii,    I am Using PSOC 5LP as my SPI slave. I am using SPIS Example by using that I can able to transfer data and receive one time. But I want to tra... Show More
Anonymous
PSoC™ 5, 3 & 1
hello,    i have attached project . I tried ti read potentiometer by ADC and use DMA to trasfer the adc data to Vdac.Also i have used usrt to print th... Show More
adpac_1560036
PSoC™ 5, 3 & 1
Hi,    I could separate 16 bit data into two 8 bits,but i couldn't figure out how to transmit,receive and combine them back.    -Newbie to PSoc3 Show More
Anonymous
PSoC™ 5, 3 & 1
Hi,    I want to know how Linked mailbox for CAN module works for rx frames and how i can process mailbox by polling method ? Show More
Anonymous
PSoC™ 5, 3 & 1
I have a simple Bootloader test program that shows the generated code for the 5LP gets stuck once the 64 char SW FIFO gets full (Write index = 63, Rea... Show More
KyTr_1955226
PSoC™ 5, 3 & 1
EDIT: I figured it out, I should have been calling U1RX_ISR_Start() to properly enable the interrupt rather than calling U1RX_ISR_Enable() alone.     ... Show More
MiSt_296941
PSoC™ 5, 3 & 1
Hey,    We have never used JTAG in production but are working on a new PCB which will have 3 PSoC's on it.  Two will have the same code and one will h... Show More
Forum Information

PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.