PSoC™ 5, 3 & 1 Forum Discussions

How can I report errors in the description of functions of the CyLib.c?

I think the trip point is set to 2.70V by the threshold value of 0x04 and not to 1.80V in two functions CyVdLvAnalogEnable and CyVdLvDigitEnable.

Hello again, everyone!

I have an application that requires me to run independent PWM frequencies of multiple valves.  Maximus pointed me to a thread that had his code doing something very similar so I thought if I could move his project to a PSoC5, I could figure out the best way to implement a similar approach in my existing project.  Unfortunately, when I moved his project over, there were a few issues (particularly with the PWM module not being compatible) so I tried to fix it best I can.  Unfortunately, it doesn't seem to work as expected.

Below is his block diagram (taken from http://www.cypress.com/forum/psoc-4-architecture/using-single-pwm-block-drive-multiple-pins-using-demux#comment-388031, thanks a lot, Maximus!):

Below is my updated block diagram:

I tried to leave as much the same as possible but since a lot of the outputs have changed, it might not be doing what I expected it to (it's very possible I have the wiring incorrect).

I took a look at the output and the counter seems to be working just fine (you can see P_00 counting every 4 signals) and the PWM output IS alternating between the output pins, so that portion is correct.

The issue seems like lie with the PWM output.  First off, I'm getting what appears to be negative voltages being generated (not sure if it's just ringing because it's moving too fast? or if the issue is with something I changed in code).

There is one line of code that I commented out that I honestly didn't know what it did (it was giving me an error and I was having trouble resolving it).

Below is the line I commented out in the ISR file:

//PWM_ClearInterrupt(PWM_INTR_MASK_TC);

It appears to be clearing the TC interrupt but I am guessing this is a relic from the previous PWM setup since the counter seems to be working as expected.

Below are some screenshots of my scope.

Yellow:  P_00 (looks to be working correctly)

Blue:  P_01 (seems to have some sort of ringing issue)

Yellow:  p0 (still shows the ringing issue coming from the PWM output.  Frequency is not changing)

Blue:  p1 (same issues as p0)

I'm attaching the project file of the updated project.  Any help someone could give me to help resolve this would be greatly appreciated.   This is such a great forum and I've learned so much from it already!  Thanks for all your help!

I'm trying to configure a UART at 921.6 kbaud but get a warning that the automatically generated clock signal is not within the tolerance range.

I have tried changing the IMO frequency and using the 24 MHz XTAL with no luck.

What am I missing? Do I need a different external crystal oscillator?

I am attempting to incorporate the EMIF into a design.  I chose asynchronous mode as I needed a chip select (cen), a write enable (wen) and read enable (oen... It should

work for this case).  Originally I set the bus clock to 33 MHz (it was the default), but then I decided to slow it down, so currently it is at 11MHz.  I've even slowed down the external memory speed (175ns).  In the project I start the EMIF component with EMIF start, but monitoring the cen, wen, and oen signals with an O-scope show that the lines remain high even during memory accesses to 0x60000000.  Unfortunately, I can't easily post the project here as the machine I'm running it from isn't internet connected and isn't readily available.  But, my main question is: does the Cy8c5888lti-lp097 have an EMIF?  I haven't seen anything that indicates it wouldn't.  and PSoC Creator 4.1 (I'm not using 4.2 here) doesn't indicate any issues.

One other question:  I saw in a post from March 2017 that the 8 bit data bus width doesn't work with EMIF.  Is this still the case?  The post referred to debugging specifically, but I was wondering if that was a deeper issue because I need 8 bit data bus width.

One correction:  It appears that the OEN, WEN, and CEN go high (well, I should say "higher" because it goes to about 4V from 3.3 or 3.4).  It is as if the documentation on the signals is wrong (it says they are active low) or at least that the component is trying to do something else.