This question was out of curiosity. I was just going through the clocks of PSoC and was interested in how IMO works. I just know there is a bandgap refernece on the basis of which it works, but i dont know the exact configuration . So I thought forum will help me in knowing stuffs.
You might try the ARM website and ask that question about the M3 Core.
The core documentation for FPGA and SOC silicon integrators should have
As hli said, its a factory trimmed internal RC oscillator. A factory trim for each frequency range is stored in the device.Tolerance usually varies from 1% at the lower (3 MHz) frequencies, up to about 10% at highest setting.