Thank you very much for your prompt and useful response. I apologize if I confused you on my previous question. But what I want to know is what is the numbers of limit of I2C or how many I2C peripherals I can use? e.g CY8C3866LTI-068 - How many I2C peripherals it can provide? only 2? I2C1 + Any? Since CY8C3866LTI-068 doesn't have I2C0. Or I can use all the GPIO/SIO and make these pins an I2C peripherals?
For PSoC3, there is one fixed function I2C that is available. You can use as many UDB based I2Cs until you run out of the total UDBs in the device. With regard to pins, any number of GPIOs can be used for I2C but these GPIOs cannot be used to wakeup the device on address match.
You can use both a fixed-function I2C, or an UDB-based I2C implementation. If you use the latter, it will consume 2 UDB datapaths and 33 UDB macro cells per instance (for an I2C master - the I2C slave needs 1 UDB and 25 MCs). This would allow you to hve 5 UDB-based Master-I2C components in your design (the CY8C3866LTI has 24 UDBs, with 2 PLD each, with in turn 4 macro cells in each PLD, which results in 192 MCs overall).
So you should be able to use up to 6 I2C components. But note that there are functional and performance differences between the fixed-function and UDB-based implementations. Look up the documentation for the I2C component for more details.
Since I2C is a bus you will have several different slaves connected to a single master. Each slave must have its own address to distinguish them from each other.
So it seems to be a bit unlikely that you need more than two I2C masters in a single PSoC.
Theoretical limit on I2C is 1008 nodes. But this is dependent on buss
C loading effects on timing. There are also leakage considerations in
very large busses.
A useful reference - http://en.wikipedia.org/wiki/I%C2%B2C#Physical_layer