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I am trying to DMA from an SRAM array into a Control Register at a 100khz rate. (See attached project)
I am building under PSoC Creator 4.2, but also tried it under 4.3. Same results either version of Creator.
According to this post (DMA to GPIO ) feeding a clock into DRQ should work at the clock rate. As you can see from this image here, once started, the DMA keeps transferring at a high rate ( appears to be about 3mhz). I am sending 4 bytes, 0,1,2,3 out the control register over and over.
I want the DMA to start over automatically, and transfer at the DRQ rate over and over, re-running the array each time. (The Preserve parameter is set to 1 for this, and it appears to be working.)
The Bytes per burst and request per burst are both 1 (from the DMA wizard):
#define DMA_1_BYTES_PER_BURST 1
#define DMA_1_REQUEST_PER_BURST 1
#define DMA_1_SRC_BASE (CYDEV_SRAM_BASE)
#define DMA_1_DST_BASE (CYDEV_PERIPH_BASE)
/* Variable declarations for DMA_1 */
/* Move these variable declarations to the top of the function */
The answer by XiaoweiZ_71 is the closest to the original question, So I will give him credit. The project I included was pretty well hacked up.
The "correct" answer is 1) do not use CY_DMA_TD_AUTO_EXEC_NEXT (per XiaolweiZ_71). *and* 2) the Serial Shift Register *cannot be used with DMA with more than 8 bits configured in the shift register* 32 bits configured in the shift register with 4 bytes per burst produces 3 "0" byte outputs and 1 byte with data.
That limitation is *not* an issue, since the goal is to load from an array in memory. It does allow for running arbitrarily large arrays without interrupting the cpu, which was the goal
What I do not understand is why the DMA loops, without the CY_DMA_TD_AUTO_EXEC_NEXT, but I am not going to obsess over it.