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Is there programmable logic in a PSoC that's active before running a "Start" for the individual component or logic section?
Specifically, what programmable logic or pin states within a PSoC are functional at power up before the MCU is Active or reset is released?
Greg
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Greg,
Theoretically no PLD logic is active (or configured) before the MCU is active.
This is because the PLD logic switches are register/RAM based. These registers are reset to default values at reset and need to be set by the MCU almost immediately after the reset is released.
Additionally for many of the components that use an Init() API call, the control register that "powers" the PLD logic is turned off at reset.
Having said that... there are Non-Volatile latches that are preserved through a reset on many if not ALL the digital GPIO pins. They are defined at design-time and are the default logic settings for these pins on reset. Note: These latches should not be changed in SW at run-time. This is because, although non-volatile, that have only about 100 write endurance specification.
Len
"Engineering is an Art. The Art of Compromise."
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Greg,
Theoretically no PLD logic is active (or configured) before the MCU is active.
This is because the PLD logic switches are register/RAM based. These registers are reset to default values at reset and need to be set by the MCU almost immediately after the reset is released.
Additionally for many of the components that use an Init() API call, the control register that "powers" the PLD logic is turned off at reset.
Having said that... there are Non-Volatile latches that are preserved through a reset on many if not ALL the digital GPIO pins. They are defined at design-time and are the default logic settings for these pins on reset. Note: These latches should not be changed in SW at run-time. This is because, although non-volatile, that have only about 100 write endurance specification.
Len
"Engineering is an Art. The Art of Compromise."