Firstly, I understand there is a separate forum for PRoC BLE but this issue is not BLE related and I thought it may be better suited here. If I'm wrong then feel free to move it to the PRoC BLE forum.
I'm trying to set up a SPI comms link between a PRoC BLE module and a PIC microcontroller. The PIC is the SPI master and the PRoC the SPI slave. The issue I'm having is with the data rate settings of the PRoC module. SCLK is running at 5 MHz, determined by the PIC (SPI master). This frequency cannot be changed as the SPI bus is shared by other devices. Theoretically the data rate at this frequency would be 5 Mbps, but there is no such option available on the SBC SPI component (4 Mbps or 6 Mbps are the closest options). Therefore, I imagine I need to make use of the "Clock From Terminal" function by hardwiring the clock to a separate pin in order for the PRoC to determine the data rate. I just don't know how to do this. I assumed this would require an analogue pin input but this throws up an error of mismatched types. Changing the pin to digital brings up errors saying a clock block is required. Adding a clock block does not work either. The datasheet does not explain how to implement this option and a search of the forum and 100 projects does not shed any light on this either.
Can anyone offer any advice.
It is not quite obvious, but you may key in a "5" into the data rate field.With the max frequency you will reach 4785kbit which is < 5% deviation. Don't know if that runs without errors.
Thanks for the reply. I feel a bit foolish now for not trying that. It does allow me to set the data rate at 5 Mbps, as you suggested. The "actual data rate" given to the left of the data rate box is telling me the theoretical maximum speed is actually only 480 kbps. No settings changes will increase this value. Is this just a built-in maximum data rate for this device? The electrical characteristics don't give a maximum data rate for the SPI module, yet the maximum frequency is 8 Mhz.
When using the external clock terminal, the clock you use their cannot be the SCLK one. The SCB SPI component uses oversampling, so CLKext=SCLK*Oversampling. The minimum oversampling factor is 6 (or 8 if the median filter is used), so the clock should be 30MHz (or 40).
Thanks for the reply. According to the datasheet the oversampling factor is only applicable when run in master mode. As I am using it in slave mode it does not have an effect. Unless I have misunderstood.
EDIT: I did misunderstand. Changing the oversampling rate, however, does not seem to have any effect on the actual data rate which seems to be permanantly fixed at 480 kbps, regardless of the data rate or oversampling settings.
In slave mode, the "theoretical maximum speed" is 4785kbps This value has to do with the delay-time of the bit sent by master, passing through the slave and sent back to master's MISO. Additional delay may come from board layout. So when you have got only 480 kbps as you report, you are doing something very wrong. Look at supplied pic.
What is the System clock you are running on?
I was running the system clock at 3 MHz, hence the reduced actual data rate, as you inferred. Increasing the system clock to 48MHz gives me the 4785 kbps data rate.
I'm now receiving data accurately. Thanks for your help.
The oversampling applies to both master and slave modes, since both receive data. 3MHz clock, with an oversampling of 6, give 500kbps data rate. (so maybe your real clock speed is 2.88MHz?)
It was set at 3 MHz, though I didn't actually measure the frequency of the clock so it may have been lower. I imagine there is some tolerances to take into consideration. Anyway, I have increased the clock to 48 MHz, as this particular product is not battery powered, and the data is being received accurately.