PSoC™ 4 Forum Discussions
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Hello Cypress.
Q1)
When Tx clock source setting is “Auto”, how does CSX select it?
Below is my understanding.
Is my understanding correct?
====================================================
1: Check whether both of following 2 relational formulas are satisfied.
a) 20 =< ModCLK/TxCLK =< 160
b) Nsub >= (2^sscn-1) * (ModCLK/TxCLK)
2: The Priority order is as follows.
(Higher) SSC10 -> SSC9 -> SSC7 -> SSC6 -> Direct (Lower)
(TX clock source setting becomes “Direct” if either a) or b) of above formulas is not satisfied.)
====================================================
Q2)
If Q1 is yes, Number of subconversion needs to be quite large value in order for SSC to be selected.
In actual application, I think that SSC almost is not selected.
Even if CSX Tx clock source setting is “Auto”, sense clock source will become “Direct” in most cases.
Is my understanding correct?
For example, if ModCLK is 24000kHz and TxCLK is 300kHz, SSCx is not selected regardless of value of subconversion.
SSC is difficult to choose, so CSX noise tolerance seems to be worse compared to CSD.
CSD’s SSC is also difficult to choose, but CSD has PRS.
Please advise it.
Do you have any information and comment about it?
Best Regards.
Yutaka Matsubara
Show LessI'm trying to make a luxometer using PSOC 5LP CY8C5888LTI-LP097 with this code
#include <project.h>
#include <stdio.h>
#include <math.h>
int main()
{
uint8 i;
int Lux;
LCD_Start();
char8 publicar1 [22];
float32 conversion1,conversion2;
CyGlobalIntEnable;
ADC1_Start();
ADC1_StartConvert();
ADC1_IsEndConversion(ADC1_WAIT_FOR_RESULT);
for(;;)
{
LCD_PrintString("Int.Luminosa");
LCD_Position(1,8);
conversion1 = ADC1_GetResult16(0);
conversion2 = ((5.000000*conversion1)/1024)*0.232;
Lux = ((2500/conversion2)-500)/5;
LCD_PrintString("Lux");
LCD_PrintNumber(Lux);
LCD_Position(0,2);
CyDelay(200);
if(Lux>=51 && Lux <=200)
{
for(i=0;i<30;i+=2)
{
LCD_DrawHorizontalBG(1,0,2,i);
CyDelay(150);
}
LCD_ClearDisplay();
}
if(Lux>=202 && Lux <=350)
{
for(i=0;i<30;i+=2)
{LCD_DrawHorizontalBG(1,0,3,i);
CyDelay(150);
}
LCD_ClearDisplay();
}
if(Lux>=360 && Lux <=600)
{
for(i=0;i<30;i+=2)
{LCD_DrawHorizontalBG(1,0,4,i);
CyDelay(150);
}
LCD_ClearDisplay();
}
if(Lux>=620)
{
for(i=0;i<30;i+=2)
{LCD_DrawHorizontalBG(1,0,5,i);
CyDelay(150);
}
LCD_ClearDisplay();
}
}
}
and this is the diagram for the protoboard
and the ports P2[6:0] and P0[6]
please help
Show LessSDA(P0.5) and SCL(P3.0). The raspberry detects another I2C. Here is the code. I am using PSoC 4.
Show Less#include <project.h>
uint8 bufSize;
uint8 readBuffer[] = {1,2,3,4,5,6,7,8,9,10};
uint8 writeBuffer[10];
uint8 byteCnt;
uint8 userArray[10];
uint32 status;
int main()
{
I2C_1_I2CSlaveInitReadBuf(readBuffer, 10);
I2C_1_I2CSlaveInitWriteBuf(writeBuffer, 10);
I2C_1_Start();
readBuffer[2]=11;
for(;1;)
{
status=I2C_1_I2CSlaveStatus();
if(0u!= (status & !I2C_1_I2C_SSTAT_RD_CMPLT))
{
I2C_1_I2CSlaveClearReadBuf();
}
if(I2C_1_I2CSlaveStatus() & I2C_1_I2C_SSTAT_RD_CMPLT)
{
byteCnt=I2C_1_I2CSlaveGetWriteBufSize();
for (uint8 i=0; i<byteCnt;i++)
{
userArray=writeBuffer;
}
I2C_1_I2CSlaveClearWriteStatus();
I2C_1_I2CSlaveClearWriteBuf();
}
}
}
I am doing a project that uses 5 capsense buttons to operate a locking mechanism in my project. I m having issues that when i power up the unit by placing batteries into the unit it some times does not operate properly. There are times I only get 4 buttons to work or I get only one button to work. Most the time is does work properly were all 5 buttons work great. In the design i am using the shield option and activated sense my project will be around water a significant amount of time.
CapSense Setup:
I have a 2.2nF cap on the Cmos pin and a 10nF cap on the Csh pin.
Board:
The board is a four layer board in which i followed the guidelines suggested in getting started with capsense. i followed the guidelines in AN85951 page 110.
Top layer: Hatch fill 7-mill and 45-mil grid ... connected to shield.
Layer-2: Hatch fill 7-mill and 70-mill grid ... connected to shield.
Layer 3: Solid Plane ... connected to Gnd
Bottom Layer: Hatch fill 7-mill and 70-mill grid ... connected to Gnd
I have attached my project for review.
I was hoping i could get some help as to why my capsense is not working constantly all the time at power. I my board is need for review let me know and i will post it if necessary.
Thanks
Scott
Show LessHi
There is a problem if CAN host sends large amount of data, CY8C4147 cannot receive data.
Does cypress have CAN software filter ? Thanks.
BR
Grace
Show LessAs described in Em_EEPROM 2.0 datasheet, I have an Em_EEPROM whose storage is at a fixed address,
and it is working very well.
When i add a bootloadable component in the project, all is working if Em_EEPROM storage
address is not fixed, but I can not define a fixed address as specified in the datasheet ?
Show Less
Hi,
Can we implement similar functionality mentioned here https://community.cypress.com/docs/DOC-14244 for PSOC3/5LP in PSOC4.
Can we control GPIO from firmware while it is connected to TCPWM and TCPWM is in stop condition?.
Regards,
Hardik Harpal
Show LessHello All,
As shown in the figure below, SARADC block diagram in PSoC4 Architecture TRM is not displayed correctly.
Could you tell me the correct figure?
==============================================================================
================================================================================
Best Regards.
Yaku
Show Less