PSoC™ 4 Forum Discussions

In KBA210620 you say that 22Ohm resistors should be placed in series with the D+ and D- USB data line but the technical reference manual specifically says that the silicon has 22Ohm resistors internal to the chip:

18.1 Features
The PSoC USB has these features:
...
■ Integrated 22  USB termination resistors on D+ and D– lines, and 1.5-k pull-up resistor on the D+ line

Do I need external 22Ohm resistors as well?

KBA210620 also says that 0.1uF should be connected between VBUS and GND. Is this necessary even if VBUS is just used to sense the presence of the host, and enable the USB drivers? There is no reference to this in the trm.

I am having problems getting the USB to work reliably. It works as long as there is at least one USB hub between the PSOC and host controller on the PC, but not if the PSOC is connected directly to the host controller, either USB3 or USB2. Error message is : "USB device not recognised, the last device connected to this computer malfunctioned and windows does not recognise it" with device manager saying "Windows has stopped this device because it has reported problems. (Code 43). A request for the USB device descriptor failed."

Traces on the PCB between USB connector and PSOC are about 5mm in length, matched to about 0.5mm,  and reasonably matched to 100 Ohms. PSOC is self powered.

Hi,

What happens to PSoC4 if RS-232 serial cable is unplugged during a bootlodable update by the bootloader via UART? Does the bootloader keep waiting for the next UART reception?

Since it's only halfway written to Flash, it may lead to corruption of the bootlodable. But if PSoC4 is reset and the Host System sends the bootloadable image again, I think it's possible to update the bootloadable.

Best regards

Hi, we are preparing our device with a cyble 012011-00 ble module for RED certification testing. One of the test requires to turn the radio/transmitter off/idle, but the receiver should be on. How can we do that? We are using EZ-serial firmware on the cyble, but I can't find any setting or parameter to do this. (the test is the receiver spurious emission test) 

Hello,

I am using PSOC4100S MCU CY8C4147AZI-S445 with PSOC Creator 4.2.

I want to switch Pins(P3.0(RX) and P3.1(TX))  from UART SCB to Input pins. 

I followed this link.

In this Uart port is stopped, but In Uart tx pin, it reads value 0, but on the it is 3.3V (tested with multimeter). I used following code:

temp = CY_GET_REG32 (CYREG_HSIOM_PORT_SEL3);

        // Configure UART_Rx pin to be controlled in firmware

        CY_SET_REG32 (CYREG_HSIOM_PORT_SEL3, CY_GET_REG32 (CYREG_HSIOM_PORT_SEL3) & 0xFFFFFF00);

        // Set the drive mode of UART Rx pin

        UART_1_tx_SetDriveMode(UART_1_tx_DM_RES_UP);
        //CY_SET_REG32 (CYREG_HSIOM_PORT_SEL3, temp);

Please help me for this issue.

Thank You 

I have a pin colection (number of pin= 😎 forming a 8 bit port on P0.0 to P.7. For this port is used as to interface my device in a byte way in one mode. My device also  allow to run with an SPI in serial mode. Here I have to configure the port each pin differently (input/output) to be able to connect as SPI. Each pin configuration needs 3 bit so for 8 bits this will end up in a uint32_t for configuration.

If I use each pin seperatly (number of pin =1 eight times), I will lose the possibility to write all 8 bits in one cycle... I have to generate a bif if / else construct for each bit of the byte, slowing down my write cycle.

I want to have a fast byte access and a fast bit access of each pin / port and I want to assign aome pins

case 1 to the SPI module and sone single control lines

case2 to 8 port bidirectional

and diong this in runtime.

Please tell me the name and the access posibility of this 32bit register. It would be great if you will publish all the information you are hiding how the peripheral exactly look (structure and register/flags names), how the register are named so I can use the controller bejond the methods you are offering in your API.

I have a bootloader where I set the bootloader version parameter to 0xabcd. I enter the bootloader using the bootloader command and then I check the meta data using the get metadata command, I get the right bootloader version 0xabcd. I then flash the chip with a new bootloadable using the bootloader and I reset the chip. After the chip resets, it enter the bootloader and doesn't exit until I send it a command. However when I send it enter bootloader using the bootloader command and then I check the meta data using the get metadata command, I get the wrong bootloader version. Is this expected behavior or am I missing something?

Are the PSoC4 CY8C4247AZI-M485 and the CY8C4248AZI-L485 pin for pin compatible?  Is the CY8C4248AZI-L485 a drop in replacement for the CY8C4247AZI-M485?  I have a board designed for the CY8C4247AZI-M485 and finding out more RAM is needed.  

Also, the CY8C4248AZI-L485 has USB pins that are no-connects on the CY8C4247AZI-M485.  My board is designed already.  If the CY8C4248AZI-L485 is a drop in replacement for the CY8C4247AZI-M485, what should I do with the USB pins?  Just disable these USB pins?  Thanks.