BLE Module PCB Layout

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Anonymous
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We are developing a product with the CYBLE-214009-00 EZ-BLE PSoC Module. It is clear that there shouuld be a keepout area around the antenna, but is it allowed to place tracks, vias and planes under the part between the pins?
To be honest I am a bit confused because the CYBLE-214009-EVAL EZ-BLE PSoC Evaluation Board has quite a strange layout without Ground-plane in the vicinity of the module and no traces under the module.

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rola_264706
Level 8
Level 8
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No signals should be routed  in the Antenna RF area or pins that feed the RF antenna.

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Anonymous
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It is clear that there shouuld be a keepout area around the antenna as specified in the datasheet.

But is it allowed to place tracks, vias and planes under the part between the pins?

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Anonymous
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We have problems soldering the CYBLE-214009-00 EZ-BLE PSoC Module. It is difficult archiving 100% reliable solder joints and we have a lot of failures in the field.

Are there any aditional informations available for example a recommended solder temperature profile? Other module manufacturers have a lot of available informations including various proven footprints and design guides but I haven't found anything useful from Cypress.

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Anonymous
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The datasheet for the module located at this page: CYBLE-214009-00, EZ-BLE™ PSoC® Module | Cypress Semiconductor

contains the solder reflow temperature information: Page 35 specifically

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Anonymous
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My problem is that we have reliability issues and a possible cause is a unsuitable solder temperature profile.
A maximum peak temperature is not a solder profile...

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Anonymous
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From what I've seen, as long as you follow the antenna keepout you will have radio functionality; Minimizing EMI caused by traces/vias/pins underneath the module on the other hand is "optional", but I would guess have traces running under the rest of the module would potentially lead to EMI interference to some extent for the module operation either with the code running, or on the antenna TX/RX

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