Microcontrollers Forum Discussions

Hello,

I am trying to flash littlefs filesystem on the qspi external serial flash memory in XMC7100 V1.1. As I see library mtb-littlefs is not included in the XMC7100 kit but i have included the mtb-littlefs from PSoc6 Kit to my project and in makefile included target as XMC7100 (my board).

BOARD: XMC7100 EVK Lite v1.1

Memory: External QSPI flash memory

These are the errors when I try to builld the file:

Initializing build: mtb-example-psoc6-filesystem-littlefs-freertos Debug APP_KIT_XMC71_EVK_LITE_V1 GCC_ARM

Prebuild operations complete

Auto-discovery in progress...
Auto-discovery complete
Commencing build operations...

Tools Directory: C:/Users/Prasad/ModusToolbox/tools_3.2
"Using linker bsps/TARGET_APP_KIT_XMC71_EVK_LITE_V1/COMPONENT_/TOOLCHAIN_GCC_ARM/linker.ld"

Constructing build rules...
Build rules construction complete

==============================================================================
= Building application =
==============================================================================
Generating compilation database file...
-> ./build/compile_commands.json
Compilation database file generation complete
Building 223 file(s)
Compiling ../mtb_shared/mtb-littlefs/latest-v2.X/source/lfs_qspi_memslot.c -DCOMPONENT_APP_KIT_XMC71_EVK_LITE_V1 -DCOMPONENT_CAT1 -DCOMPONENT_CAT1C -DCOMPONENT_CAT1C4M -DCOMPONENT_CM7 -DCOMPONENT_CM7_0 -DCOMPONENT_Debug -DCOMPONENT_FREERTOS -DCOMPONENT_GCC_ARM -DCOMPONENT_MW_ABSTRACTION_RTOS -DCOMPONENT_MW_CAT1CM0P -DCOMPONENT_MW_CLIB_SUPPORT -DCOMPONENT_MW_CMSIS -DCOMPONENT_MW_CORE_LIB -DCOMPONENT_MW_CORE_MAKE -DCOMPONENT_MW_FREERTOS -DCOMPONENT_MW_MTB_HAL_CAT1 -DCOMPONENT_MW_MTB_LITTLEFS -DCOMPONENT_MW_MTB_PDL_CAT1 -DCOMPONENT_MW_RECIPE_MAKE_CAT1C -DCOMPONENT_MW_RETARGET_IO -DCOMPONENT_RTOS_AWARE -DCOMPONENT_SOFTFP -DCOMPONENT_XMC7x_CM0P_SLEEP -DCORE_NAME_CM7_0=1 -DCY_APPNAME_mtb_example_psoc6_filesystem_littlefs_freertos -DCY_RETARGET_IO_CONVERT_LF_TO_CRLF -DCY_SUPPORTS_DEVICE_VALIDATION -DCY_TARGET_BOARD=APP_KIT_XMC71_EVK_LITE_V1 -DCY_USING_HAL -DDEBUG -DLFS_THREADSAFE -DTARGET_APP_KIT_XMC71_EVK_LITE_V1 -DXMC7100D_F176K4160  -I. -Ibsps/TARGET_APP_KIT_XMC71_EVK_LITE_V1 -Ibsps -Ibsps/TARGET_APP_KIT_XMC71_EVK_LITE_V1/config/GeneratedSource -Ibsps/TARGET_APP_KIT_XMC71_EVK_LITE_V1/config -Ilibs/abstraction-rtos/include -Ilibs/abstraction-rtos -Ilibs/abstraction-rtos/include/COMPONENT_FREERTOS -Ilibs/cat1cm0p/COMPONENT_CAT1C -Ilibs/cat1cm0p -Ilibs/clib-support -Ilibs/clib-support/TOOLCHAIN_GCC_ARM -Ilibs/cmsis/Core/Include -Ilibs/cmsis/Core -Ilibs/cmsis -Ilibs/core-lib/include -Ilibs/core-lib -Ilibs/freertos/Source/include -Ilibs/freertos/Source -Ilibs/freertos -Ilibs/freertos/Source/portable/COMPONENT_CM7 -Ilibs/freertos/Source/portable -Ilibs/freertos/Source/portable/COMPONENT_CM7/TOOLCHAIN_GCC_ARM -Ilibs/mtb-hal-cat1/COMPONENT_CAT1C/include/pin_packages -Ilibs/mtb-hal-cat1/COMPONENT_CAT1C/include -Ilibs/mtb-hal-cat1/COMPONENT_CAT1C -Ilibs/mtb-hal-cat1 -Ilibs/mtb-hal-cat1/COMPONENT_CAT1C/include/triggers -Ilibs/mtb-hal-cat1/include -Ilibs/mtb-hal-cat1/include_pvt -Ilibs/mtb-hal-cat1/source -Ilibs/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include -Ilibs/mtb-pdl-cat1/devices/COMPONENT_CAT1C -Ilibs/mtb-pdl-cat1/devices -Ilibs/mtb-pdl-cat1 -Ilibs/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip -Ilibs/mtb-pdl-cat1/drivers/include -Ilibs/mtb-pdl-cat1/drivers -Ilibs/mtb-pdl-cat1/drivers/third_party/ethernet/include -Ilibs/mtb-pdl-cat1/drivers/third_party/ethernet -Ilibs/mtb-pdl-cat1/drivers/third_party -Ilibs/retarget-io -I../mtb_shared/mtb-littlefs/latest-v2.X/bd -I../mtb_shared/mtb-littlefs/latest-v2.X -I../mtb_shared/mtb-littlefs/latest-v2.X/include 
../mtb_shared/mtb-littlefs/latest-v2.X/source/lfs_qspi_memslot.c:487:5: error: 'cy_stc_smif_mem_device_cfg_t' has no member named 'mergeTimeout'
  487 |     .mergeTimeout = CY_SMIF_MERGE_TIMEOUT_1_CYCLE
      |     ^
make[1]: *** [libs/core-make/make/core/build.mk:283: C:/Users/Prasad/mtw/Littlefs_Filesystem/Littlefs_Filesystem/build/APP_KIT_XMC71_EVK_LITE_V1/Debug/ext/mtb_shared/mtb-littlefs/latest-v2.X/source/lfs_qspi_memslot.o] Error 1
make: *** [libs/core-make/make/core/main.mk:385: secondstage_build] Error 2
"C:/Users/Prasad/ModusToolbox/tools_3.2/modus-shell/bin/make CY_MAKE_IDE=eclipse CY_IDE_TOOLS_DIR=C:/Users/Prasad/ModusToolbox/tools_3.2 CY_IDE_BT_TOOLS_DIR= -j8 --output-sync all" terminated with exit code 2. Build might be incomplete.

When I comment the line:

#if (CY_IP_MXSMIF_VERSION >= 2)
    /** Continuous transfer merge timeout.
     * After this period the memory device is deselected. A later transfer, even from a
     * continuous address, starts with the overhead phases (command, address, mode, dummy cycles).
     * This configuration parameter is available for CAT1B devices. */
    //.mergeTimeout = CY_SMIF_MERGE_TIMEOUT_1_CYCLE
#endif /* CY_IP_MXSMIF_VERSION */

I get failed to creat spi device block:

Could someone help me with ".mergeTimeout = CY_SMIF_MERGE_TIMEOUT_1_CYCLE" error?

When using the mtb-littlefs through the mtb-shared, how do I enable the cy_hal, freertos and thread in make file?
I tried to add the necessary comments on my application makefile but it is not enabling the corresponding if condition in the files in mtb-shared folder/mtb-littlefs!

best regard,
PrasadA

I can program the psoc5 using openocd now, with some caveats. However, if an NVL entry exists, it stops.

I have a project which somehow did something to the NVL.

I understand setting the Reset condition on the Pins can cause this.  However, setting the pins to Don't Care doesn't fix this problem, so I suspect something else is causing the NVL to change.

Is there *any* gui / command line interface to find out what is causing the NVL to be set? (so it can be "fixed" in the project?)

This would not normally be a problem, but using openocd to program the psoc halts when the NVL entry is in the Creator generated hex file.  I have multiple reasons for using openocd, some of which involve production machines. Others are very fast compile/debug cycle.  (https://socmaker.com/?p=1004, and https://socmaker.com/?p=1027)

If I use objcopy, could I exclude that from the elf file for the new obj?  (before making a hex file) If so, would it be by address? If so, which address?  otherwise, how would I do that exclusion?

Is there a way to use openocd to program the NVL (perhaps kitprog in kitprog mode?) (Just checking)

Thanks!

Hello!

I have the following code that is not working. After first call of readRegister response is 0, after calling readRegister the second time, I receive the expected value. 
Can you please help? I must mention that my application is based on the Infineon SPI_CPU_TC334 training and I've also tried to change  spiMasterChannelConfig.channelBasedCs but I still don't receive the expected behavior.

I've also attached the source code for QSPI.
Thank you!

/**********************************************************************************************************************
 * \file Cpu0_Main.c
 * \copyright Copyright (C) Infineon Technologies AG 2019
 * 
 * Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of 
 * business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use
 * are agreed, use of this file is subject to following:
 * 
 * Boost Software License - Version 1.0 - August 17th, 2003
 * 
 * Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and 
 * accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute,
 * and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the
 * Software is furnished to do so, all subject to the following:
 * 
 * The copyright notices in the Software and this entire statement, including the above license grant, this restriction
 * and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all 
 * derivative works of the Software, unless such copies or derivative works are solely in the form of 
 * machine-executable object code generated by a source language processor.
 * 
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
 * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE 
 * COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN 
 * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 
 * IN THE SOFTWARE.
 *********************************************************************************************************************/
#include "Ifx_Types.h"
#include "IfxCpu.h"
#include "IfxScuWdt.h"
#include "QSPI_Config.h"
#include "Timers.h"

#define LED &MODULE_P00,5

IFX_ALIGN(4) IfxCpu_syncEvent g_cpuSyncEvent = 0;

volatile uint8 delay;
static unsigned char response = 0;

void core0_main(void)
{
    IfxCpu_enableInterrupts();
    
    /* !!WATCHDOG0 AND SAFETY WATCHDOG ARE DISABLED HERE!!
     * Enable the watchdogs and service them periodically if it is required
     */
    IfxScuWdt_disableCpuWatchdog(IfxScuWdt_getCpuWatchdogPassword());
    IfxScuWdt_disableSafetyWatchdog(IfxScuWdt_getSafetyWatchdogPassword());
    
    /* Wait for CPU sync event */
    IfxCpu_emitEvent(&g_cpuSyncEvent);
    IfxCpu_waitEvent(&g_cpuSyncEvent, 1);
    
    //init1msTimer();
    initQSPI2Master();
    initQSPI2MasterChannel();

    resetIMMU();
    selfTestIMMU();

    /*uint8 xGyro, yGyro, zGyro;*/
    while(1)
    {
        response = readRegister(WHO_AM_I, 0x00);
       // response = readRegister(WHO_AM_I, 0x00);
        //readIMMUAxis(&xGyro, &yGyro, &zGyro);
    }
}

您好，我在使用xmc4800，ethercat。这个示例代码ETHCAT_SSC_AUT_BASE_XMC48里添加PMSM_FOC组件，报了两个错误，我在单独使用PMSM_FOC这个工程正常编译运行。但在ETHCAT_SSC_AUT_BASE_XMC48就会出现这两个问题，请看附件图

多次尝试无法解决，请帮看一下。感谢！！！

Hi 

I want to know  sleep current of TLE9853QX & also it auto wake when LIN signal is available. My customer is using in Flush door handle.

I have seen multiple sleep mode specs available in datasheet  but not able to understand actual avg sleep mode current required.

Regards

Lucky Kumar

TL9183Q MLCC Chip Capacitor for Charge Pump CB 4.7uF It is prone to whistling, and replacing it with a larger or smaller capacitor value does not improve it much.

Any good solutions?

Hi,

 I am having the Traveo-T2G kit. CYTVII-2D-4M-216 set and the CYT3DLABHBES  cpu.

I am running the TRAVEO T2G Sample driver Library provided by infineon. I want to use freeRTOS in the project.

Previously I was using IAR V9.30.1 , in that version I could see the option in workspace to switch to the RTOS supported workspace.

Now I am using IAR v8.22.2, here no option in workpace for RTOS. Can somebody help me to run RTOS example.

My purpose is to control the private server motor. Because most servo motors are controlled using pulses. So if it involves the acceleration and deceleration of the motor, the interval between each pulse may be different. Therefore, every time the timer is interrupted, the entry time of the next timer will be changed. In STM32, I can make the time into a list. Then directly import the register TIM3->ARR = tim[X]. However, it was found that in XMC1302, it is not allowed to write values directly to the register. But need to use

TIMER_Stop(&TIMER_0);
status = TIMER_SetTimeInterval(&TIMER_0, tim[ X ]);
if (status == TIMER_STATUS_SUCCESS)
{
        TIMER_Start(&TIMER_0);
}

This is how you can reset it. But this code runs too slowly. About 60US. This is obviously too long. Is there a faster way?