Nor Flash Forum Discussions

Hi

Would anyone be able to advise whether leads on cypress components are Matt tin over Nickel or over silver... or something else? The online data for S29AL016J70TFI020 (here https://www.cypress.com/part/s29al016j70tfi020 ) only specifies Matte tin, but in order to justify a tin whisker mitigation plan it is important to identify the barrier between the lead and the tin finish. Any pointers that help identify this would be greatly appreciated.

Many thanks

John.

Why is Cypress App Note AN98540 (Connecting Cypress SPI Flash to Configure Altera FPGAs) marked Obsolete? The Document History Page shows that the document was obsoleted on 4/3/2018 but doesn't mention the motivation for this action.

Thanks,

Hal

Hi,

I'm trying to bring up S25FS512S on iMX8 platform with kernel 4.19, The way frameworks of SPI nor ON IMX is FlexSPI driver scans and attached NOR Flash and registers to MTD  framework with read/write hooks,

Below is my dtb entry,

    flash0: s25fl512s@0 {

        reg = <0>;

        #address-cells = <1>;

        #size-cells = <1>;

        compatible = "cypress,s25fl512s";

        spi-max-frequency = <20000000>;

        spi-nor,ddr-quad-read-dummy = <8>;

    };

Note : compatible is does not makes sens here as this node is scanned by flexspi parent node driver.

On flexspi driver probe reading SFDP and verified all the data is correct as mentioned in datasheet,

[    0.730947] fsl-flexspi 5d120000.flexspi: After matching with name  or id

[    0.730954] fsl-flexspi 5d120000.flexspi: SPI NOr sizes size 4000000 sector size 262144 num sector 256 page size 256

[    0.730958] fsl-flexspi 5d120000.flexspi: Info hardware capabilities 16480

[    0.730979] fsl-flexspi 5d120000.flexspi: SFDP header

[    0.730984] fsl-flexspi 5d120000.flexspi: head signature 0x50444653

[    0.730988] fsl-flexspi 5d120000.flexspi: Minor  0x6

[    0.730991] fsl-flexspi 5d120000.flexspi: Major  0x1

[    0.730995] fsl-flexspi 5d120000.flexspi: Basic nph  0x5

[    0.731002] fsl-flexspi 5d120000.flexspi: i 0 head id ff00 major 1 manior 0 length 9 parameter_table_pointer 90 10 0

[    0.731035] fsl-flexspi 5d120000.flexspi: i 0 head id ff00 major 1 manior 5 length 10 parameter_table_pointer 90 10 0

[    0.731041] fsl-flexspi 5d120000.flexspi: i 1 head id ff00 major 1 manior 6 length 10 parameter_table_pointer 90 10 0

[    0.731047] fsl-flexspi 5d120000.flexspi: i 2 head id ff81 major 1 manior 0 length 10 parameter_table_pointer d8 10 0

[    0.731053] fsl-flexspi 5d120000.flexspi: i 3 head id ff84 major 1 manior 0 length 2 parameter_table_pointer d0 10 0

[    0.731059] fsl-flexspi 5d120000.flexspi: i 4 head id 101 major 1 manior 1 length 47 parameter_table_pointer 0 10 0

[    0.731102] fsl-flexspi 5d120000.flexspi: non-uniform erase sector maps are not supported yet.

[    0.731113] fsl-flexspi 5d120000.flexspi: to 0x00000000:0x00000000, len:1, cmd:35

[    0.731131] fsl-flexspi 5d120000.flexspi: s25fl512s (65536 Kbytes)

[    0.731138] fsl-flexspi 5d120000.flexspi: mtd .name = 5d120000.flexspi, .size = 0x4000000 (64MiB), .erasesize = 0x00040000 (256KiB) .numeraseregions = 0

[    0.732319] slram: not enough parameters.

Here I could see blocke device ,

brw-rw---- 1 root disk 31, 0 Apr 20 19:46 /dev/mtdblock0

but when i'm trying to write onto device and getting below errors

[  171.736515] fsl-flexspi 5d120000.flexspi: Unsupported cmd 0x12

[  171.742497] fsl-flexspi 5d120000.flexspi: to 0x00000000:0x00000000, len:1, cmd:05

[  171.742513] fsl-flexspi 5d120000.flexspi: to 0x00000000:0x00000000, len:1, cmd:06

[  171.742526] fsl-flexspi 5d120000.flexspi: nor write to 0x00000000:0x00028200, len : 512

[  171.742595] fsl-flexspi 5d120000.flexspi: to 0x00000000:0x00028200, len:512, cmd:12

[  171.742599] fsl-flexspi 5d120000.flexspi: Unsupported cmd 0x12

[  171.748590] fsl-flexspi 5d120000.flexspi: to 0x00000000:0x00000000, len:1, cmd:05

[  171.748606] fsl-flexspi 5d120000.flexspi: to 0x00000000:0x00000000, len:1, cmd:06

[  171.748620] fsl-flexspi 5d120000.flexspi: nor write to 0x00000000:0x00028400, len : 512

[  171.748683] fsl-flexspi 5d120000.flexspi: to 0x00000000:0x00028400, len:512, cmd:12

[  171.748687] fsl-flexspi 5d120000.flexspi: Unsupported cmd 0x12

[  171.754677] fsl-flexspi 5d120000.flexspi: to 0x00000000:0x00000000, len:1, cmd:05

[  171.754693] fsl-flexspi 5d120000.flexspi: to 0x00000000:0x00000000, len:1, cmd:06

[  171.754707] fsl-flexspi 5d120000.flexspi: nor write to 0x00000000:0x00028600, len : 512

[  171.754769] fsl-flexspi 5d120000.flexspi: to 0x00000000:0x00028600, len:512, cmd:12

[  171.754773] fsl-flexspi 5d120000.flexspi: Unsupported cmd 0x12

[  171.760759] fsl-flexspi 5d120000.flexspi: to 0x00000000:0x00000000, len:1, cmd:05

[  171.760775] fsl-flexspi 5d120000.flexspi: to 0x00000000:0x00000000, len:1, cmd:06

[  171.760789] fsl-flexspi 5d120000.flexspi: nor write to 0x00000000:0x00028800, len : 512

[  171.760852] fsl-flexspi 5d120000.flexspi: to 0x00000000:0x00028800, len:512, cmd:12

[  171.760856] fsl-flexspi 5d120000.flexspi: Unsupported cmd 0x12

[  171.766838] fsl-flexspi 5d120000.flexspi: to 0x00000000:0x00000000, len:1, cmd:05

[  171.766854] fsl-flexspi 5d120000.flexspi: to 0x00000000:0x00000000, len:1, cmd:06

[  171.766868] fsl-flexspi 5d120000.flexspi: nor write to 0x00000000:0x00028a00, len : 512

[  171.766936] fsl-flexspi 5d120000.flexspi: to 0x00000000:0x00028a00, len:512, cmd:12

[  171.766940] fsl-flexspi 5d120000.flexspi: Unsupported cmd 0x12

[  171.772933] fsl-flexspi 5d120000.flexspi: to 0x00000000:0x00000000, len:1, cmd:05

[  171.772971] fsl-flexspi 5d120000.flexspi: to 0x00000000:0x00000000, len:1, cmd:06

[  171.772986] fsl-flexspi 5d120000.flexspi: nor write to 0x00000000:0x00028c00, len : 512

[  171.773049] fsl-flexspi 5d120000.flexspi: to 0x00000000:0x00028c00, len:512, cmd:12

Any suggestions or instructions to resolve this would be great help.

Thanks,

Naresh

Hello,

Is there any method to set CR1[1] = 1b'1 by default without any write_reg?

We're thinking of both a QUAD read based controller and a NOR flash on POR(Power on Reset). On SPI controller side, we make the controller boot-up with ECh read-opcode.But, recently we found out we need to set some configuration to FLASH with WREN, WRR before quad read execution.

So, we're looking for some method to set QUAD mode bit in CR1 by H/W default.

Thanks

Currently I am using Cypress S25FL256S SPI NOR Flash to configure Xilinx Spartan6 FPGA XC6SLX75fgg484. Now I want to use 8bit parallel configuration ROM to minimize the FPGA configuration time. In other words, I am searching alternate of Xilinx XCF32P (32Mb size) configuration ROM. The Xilinx XCF32P configuration rom is available in -40 to +85 deg C and I need parallel configuration memory in +105 deg C.

Could anyone tell me please, do Cypress offer such parallel configuration ROM?

Thanks.

hello

I am using S29GL064N, unfortunately there's no r/b pin on the chip, so I need -6 verilog model for simulating, but it was missing on the website. I only found -1 model. That's not my need.

where could I get no r/b pin verilog model for S29GL064N?

Thanks.

Please suggest the CY alternative part to replace W25Q128JVFIQ.

If there is any migration guide,

please also provide it to us,

thanks

我们有对应兼容的料号去替代MT35XU256ABA1G12-0AAT嘛？附上手册

Hi, Cypress Developer Community

My name is Iwata. From tokai-rika Co., Ltd.

I am interested in your product.

I'm trying to put a socket for S25FL064LABMFB013 on a debug board.

Please let me know if you know the manufacturer and model number of the socket that fits S25FL064LABMFB013.

Best regards

Iwata

====================================================

TOKAIRIKA CO.,LTD

株式会社 東海理化

SYSTEM ENGINEERING DEPT. NO.3.

ELECTRONICS SYSTEM ENGINEERING DIV.

ELシステム技術部 第3システム技術室 1G

260,OGUCHI-CHO,NIWA-GUN,AICHI,480-0195,JAPAN

〒480-0195愛知県丹羽郡大口町豊田三丁目260番地

岩田 拓也 （Takuya Iwata）

TEL: 0587-95-7640 (内線：3512)

E-mail: takuya.iwata@exc.tokai-rika.co.jp<mailto:takuya.iwata@exc.tokai-rika.co.jp>

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