Microcontrollers Forum Discussions

Hi, I'm using CYT4BF.

I confirmed that the Bandgap Reference circuits can be set to higher current mode or low power in the PWR_CTL2.BGREF_LPMODE register.

1) Can you explain in more detail the higher current mode and low power mode of Bandgap Reference circuits?
2) Can you tell me in what cases the PWR_CTL2.BGREF_LPMODE register is used?

BR.

taegyunahn.

Hi infineon

As the title said, I got a problem with "Vddk", I use the next formula to configure "Vddk", but some products(not all, same program) will exceed the threshold(±2%) when ambient temperature increasing, and the calculated value close to low boundary? Could you give me some advise? Thanks

你好！

在NORMAL状态下，我用WriteRow写NAR时报0xF00000AA（Writes are disabled in safety register）错误，

请问是什么原因？另外，可否提供使用WriteRow的例程？谢谢！

补充一点：这部分代码我是放在CM4里的，这可以吗？

Hi expert.

Recently, I encountered a case where the SFlash of the CYT2B75CAS chip was abnormally modified;

The chip abnormality manifests itself in the form of failure to boot from power-up, connecting to the chip through the compiler Attach to running targe mode, and then reading the data in the SFlash area of the chip;

And compared with the other two normal chips, found that the abnormal chip SFlash area has a lot of data is not the same, the difference area is mainly in the paragraph Flashboot code and Patches; attached is the SFlash area data I saved, and the 3 chips are the same batch;

Rather strangely, the code does not contain any calls to the API interface for modifying the SFlash, only the Erase Code Flash and Work Flash code;

What could cause the SFlash area of the chip to be abnormally modified? Regarding the area 0x17001C00 ~ 0x17006FFF, can it be abnormally tampered with when the chip is in Normal mode?

Please help the experts to analyze the possible reasons why SFlash is being modified abnormally;

Thank you~~

smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/TRAVEO-T2G/CYT2B7-SFlash-%E8%A2%AB%E5%BC%82%E5%B8%B8%E4%BF%AE%E6%94%B9/td-p/728079

I am learning the GTM DPLL sub-module. How can I know whether it is GTM-IP or GTM-RM according to the GTM_REV register of TC275?

Dear forum:
I write hex file to flash by cypress programmer.
I can write the hex file normally, but when I open the cypress programmer,

but why the Chip protection is UNKNOWN?

Thank you.

Comment: My soft don't touch the eFuse address.

Hi!

I've grown an inherited mess into a now now-useful application running on PSOC 5LP (CY8C5868AXU-035), using PSOC Creator 4.4.

We burn our board FW using  KitProg 'dongles' connected to the SWD port + PSocProgrammer v3.29.5 - so far so good.

But we will need to make this a UART bootloaded app, with UART bootloader, for the 'real world'. 
 
    [info: currently..  C code: ~49K flash/13K RAM; 
                                        296K .cyfit file / 7.5K  config.hex
                                        650K project hex file;
                                        future: RAM use will decrease a bit, C flash code will grow maybe 5-10 K]

1.   I have documents on bootload and broad understanding,  but where is link to ZIP file sources? 
       Found some old dead Cypress links, or links to irrelevant PSOC4 or 6 platforms...  
       Do please direct me to current valid PSOC5  code working on PSOC Creator 4.4  so I can begin to
       play with it without pulling my hair using wrong/stale stuff, errors etc.

2.   Where is the downloadable PC host app?   Ideally I would like some command line C code to
       download/burn .HEX file - small possibility exists this code might be wrangled onto an Android
       platform some future time.   

3.  Approx expected time from FW burn thru reset into acutal app (not counting 2 sec delay) for a
      650K Hex project file @ 115Kbps-8N1 serial rate? 


At first glance it seems easiest to me to use exactly the same "soft hardware" from our FW app to build the
bootloader  (which has fixed 115Kbps UART used for logging/configuration etc.)   so that there is no "discontinuity" between the entities  (other than "bootload" vs "bootloadable" distinction).

Any other guidance/tips welcome. 


Thanks,
Bill