Hyper Flash Forum Discussions
The user use the Hyper Flash S26KS128SDPBHB020; Could you tell me the init program of S26KS128SDPBHB020; Dose the S26KS128SDPBHB020 need the "init program" that was translated by the Controller through "Hyper" or "SPI"? 此型号Flash在使用的时候,需要Init 程序吗 ?在哪儿下载呀 非常感谢
Thanks
Show LessGuten Tag zusammen. Könnten Sie mir bitte mitteilen, ob es sich bei dem S29GL256S11DHVV20 auf dem Bild um ein Original handelt (Marking)?
Wenn ja:
Wir haben diesen für einen Bestückungsauftrag beschafft. Auf dem Board des Kunden sind immer 2 Stück verbaut. Bei dem Funktionstest des Kunden wurde angezeigt, dass ein Speicher 512mb haben soll. Es handelt sich dabei jedoch um die 256mb Variante. Kann es sein, dass sich die beiden gepaart haben und deshalb auf 512mb kommen?
Vielen Dank im Voraus.
Mit freundlichem Gruß:
Ronny
Show LessMY board connects an S29GL512S to 16-bit bus, and address is 0x28000000.
The Data-sheet writes AA for (SA)555, but odd address are not allowed on a 16-bit bus.
Are the following contents correct?
0x00AA ---> 0x28000AAA
0x0055 ---> 0x28000554
0x0090 ---> 0x28000AAA
Best regards.
Show LessWe are using a Spansion FL064LIF01 flash chip and are having issues with the flash chip where the configuration registers 2 & 3 have the binary codes wiped all to 0. Any ideas on what can cause this? We found in the specifications that a non-stable power supply during the register writing can cause this but have yet to be able to replicate the issue by cycling power while writing to the registers.
Show LessHi,
I have a custom board with NXP MIMRT1176 mcu that is connected to Infineon S26HS512T hyperflash.
I wrote LL driver layer which can write/read/erase data from hyperflash. It l works fine.
The only thing I can't get to work is the exit from ASO (Address Space Overlay). According to documentation, there is a dedicated command that needs a user to write 0xF0 byte and address is a "don't care".
In my code, upon bootup, I want to print memory info such as part number, memory density, voltage type and etc.
All that information comes from SFDP header that overlays memory once ASO mode is activated. Good thing is I can read the SFDP data, but I can't exit from ASO mode to default reading memory mode.
Picture below presents the memory view as seen by MCUXpresso IDE.
Information I'm trying to read is at the offset 0x800.
I get the information I want and then I proceed with writing ASO EXIT command as on the picture below.
Write and read commands look like on the pictures below:
WRITE:
READ:
Unfortunately After performing EXIT ASO I can still see the overlay data from ASO mode which indicates that mode instead of normal read memory mode.
I have no idea what I'm doing wrong. Please let me know what more you would like to know to be able to help.
Thanks,
Michal
Hi,
I am using the multichip S76HL512TC0BHB000 (HyperFlash + HyperRam) which is based on the S26HL512 (HyperFlash).
I am failing in programming more than once within the same page...
For instance, I can write a single word to address offset 0x00 but then I fail to write another in sequence unless the offset is set to 0x10..
I have tried both single word and write buffer programming methods but they both fail. Writing whole pages or part of pages works fine as long as the writing is done only once within the same page.
In the documentation S26HL512 documentation 002-12337 chap 4.10.1.1, p. 66, first sentence says "Word programming is used to program a single word or a group of words anywhere in memory" . Then on the other hand in 4.10.1.3, page 70, first paragraph and last two sentence says "..automotive versions will only support on programming operation on each page..." and "Single word programming command is also not supported".
Please help, is there a way to write single words (write buffers) in sequence on this chip having automotive grade?
Many thanks in advance
Show LessHi!
I am using the multichip S76HL512TC0BHB000 (HyperRam + HyperFlash) which is based on the HyperFlash S26HL512T.
Using a STM32 MCU and the HAL-API, I am struggling a lot in order to reading flash-ID or StatusReg. I am basically just reading "0xFF:s" whatever I try..
Is there any example available?
Show LessHi guys,
I asked Maximum Junction Temperature to this community about S29AL008TFN010.
However I could not clear one thing, so hope someone answer to my question as folllowing.
Question:
In the datasheet, Section 13, Operating Ranges, it is listed as
Ambient Temperature : -40°C to 125°C,
I think the junction temperature of an IC operating in an ambient temperature of 125°C is higher than 125°C. Is the maximum junction temperature at which the IC can operate also 125°C?
Is the maximum junction temperature at which the IC can operate also 125°C?
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Hi,
I'm using the Hyperflash PN S26KS512SDGBHM030
The datasheet for this part in section 10.6.1 Power-On (Cold) Reset (POR) and in section 10.6.3 Hardware (Warm) Reset the following paragraph is present.
If POR has not been properly completed by the end of tVCS, a later transition to the Hardware Reset state will cause a transition to the Power-On Reset interface state and initiate the Cold Reset Embedded Algorithm. This ensures the device can complete a Cold Reset even if some aspect of the system Power-On voltage ramp-up causes the POR to not initiate or complete correctly.
If I translate this, to me this is saying that if a Power-On voltage ramp-up rate is such (not defined in specification) that causing the part to not finish its internal POR, that it runs during time period Tvcs, and that an additional RESET# signal assertion will be required to force the part to go through its POR routine again and then the part will work.
1. Is this interpretation correct?
2. Is another RESET# assertion required after the voltages have stabilized after the initial RESET# for this part and the system is released?
To me the sounds like their is possibly a microcontroller inside this part with a bad reset circuit or that is susceptible to certain ramp rates.
If indeed there is an issue with voltage ramp rates or if the voltage ramp-up must be monotonic then please specify what requirements are. Having the Hyperflash reset properly is essential to be ready for commands from my processor and booting the entire system reliably.
Thank you.
Brandon
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