There are (sadly) no timing information for the gates. Gates are operating at least with the maximum clock frequency. As long as you don't get any timing warnings all will be well.
When your PWM and the negated output are connected to IO pins there is a clocking section for the pins which allows to sync the signal to HFCLK. When you intend to drive some H-bridges you (for safety & security) should think about using "dead time" insertion (TCPWM) or "dead band" (PWM 3.0)