4 Replies Latest reply on Oct 6, 2017 7:57 AM by bri_2235981

    IMO clock off by 30%


      I am using a PSoC 4 BLE in a new design, and the IMO clock is off by 30% (it's ~37MHz instead of 48MHz).   To prove this, I'm using a very simple design (pic attached) to output a divided down HFCLK (which by default is sourced from IMO).


      I would expect to see the output as HFCLK / 24 / 2 = 48MHz / 24 / 2 = 1MHz.  Instead I see (on a scope) ~768kHz.


      If I go into Configure System Clocks, and change the source of HFCLK to ECO (24MHz), then I would expect to see HFCLK / 24 / 2 = 24MHz / 24 / 2 =  500kHz.  And that's exactly what I see.


      So, ECO looks spot on at 24MHz, but IMO is about 37MHz.  And BLE, which runs on ECO, is working.  But UARTs, which run off IMO, are not working at the right frequency.


      I have not tried swapping hardware, as I don't have another board available just yet.  But this same exact design works correctly on the CY8CKIT-143A module, which has the CY8C4248LQI-BL583 (same part I am using).


      Question: The TRM discusses the CLK_IMO_TRIM2 for coarse setting the IMO frequency (3-48MHz).  I have the setting in Configure System Clocks for IMO at 48MHz (which I suspect corresponds to the TRIM2 reg).  But I see no detailed information on the TRIM1 register or PWR_BG_TRIM4/5 registers.


      Can I retrim an IMO that's that far out of wack?  Is this fixable via registers, or do I have a bad part?



        • 1. Re: IMO clock off by 30%

          Can you share the actual project that you are using? The clock / oscillator configuration would be interesting to look at.

          • 2. Re: IMO clock off by 30%

            I could (although I'd need to rip out the bulk of the project first).  However, this appears not to be a software/project problem, as the same exact design works correctly on the CY8CKIT-143A module, which has the CY8C4248LQI-BL583 (same part I am using).


            I'll likely wait until I can get a new board up and running, and see if I have the same issue - that won't happen for a few weeks.

            • 3. Re: IMO clock off by 30%

              Have a look at the clock screen in the design wide resource (and be sure to double-click on the part with the system clocks to get to the oscillator section). Maybe this can show where this clock comes from.

              • 4. Re: IMO clock off by 30%

                Took a while, but I got to try out another board and isolate the issue - I thought I'd share this if it would help anyone else.


                The answer: a board fault - VSSA was disconnected (floating).  Connecting VSSA via rework immediately fixed the issue on both boards - now IMO is 48MHz.


                (EDIT: I previously wrote VDDA, not VSSA)