1 Reply Latest reply on Jul 10, 2017 2:41 AM by snvn

    current draw on PSOC6 CY8C637BZI-MD76  worst case

    nagi.dabboussi_2397886

      Howdy

      Running the current PSOC 6 (version we are using.... CY8C637BZI-MD76)

      With everything turned on,

      (full rate SPI1..SPI2...SPI3, full rate CPU, write to flash, UART1..UART2..UART3, and I2C)

      what is the worst case (expected) current draw?

        • 1. Re: current draw on PSOC6 CY8C637BZI-MD76  worst case
          snvn

          Hello Nagi,

           

          The thread, PSoC 6X Family Datasheet (Preliminary) logs the preliminary datasheet for the PSoC 6X family. It could be very difficult to predict the worst case current drawn by the device unless the specifications of operation for each block are mentioned. However, you could go through the DC specifications of each block given in the datasheet, mark the options and add the associated current numbers. Also note that the current drawn by the device depends on that mode the device is operating in: LP vs ULP, what power regulators are being used; LDO vs SIMO buck, the loading on each GPIO pin.

           

          The specifications given in the datasheet are subject to change when the final datasheet is published.

           

          Cheers.