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To your questions -
1. Currently we do not plans for NFC in PSoC 6 family. But if there are enough requests and market need, we will consider it in our roadmap.
2. We definitely have plans to provide the BLE dongle firmware and API reference when it comes out. In fact, we do provide an API reference guide for the existing CySmart PC application, which can be used to develop PC software using the existing Cypress BLE dongles. We will be updating the same for PSoC 6.
3. PSoC can dynamically remap pins as well. I can think of two ways immediately - one is through the High-Speed IO matrix (HSIOM), which is a matrix of switches that enable connection between various blocks/peripherals and I/Os. The HSIOM settings can be dynamically changed during code execution and it is as simple as configuring a MUX. Another way is to use UDBs and Smart I/Os to implement MUXes that can be controlled during run-time.
4. Yes, emWin and emFile components are in plan for PSoC 6
5. It is a complicated answer - the internal buck regulators (there are two of them - one for PSoC core and another for BLE radio) are capable of supporting loads up to 20 mA (and 25 mA combined/total together). So, if you are sure your other circuit combined with PSoC/BLE radio does not exceed these load limits, then yes you can use the buck to power external circuits. In general, we do not recommend the use case but then nobody restricts you to use them the way you want
I hope the above answers help.
Meenakshi Sundaram R
Thank you very much for your answers.
Per your description, "the internal buck regulators (there are two of them - one for PSoC core and another for BLE radio)". May I know which PSoC core, M4 or M0+, you mean here?
Thanks a lot,
I think it means the core logic, which would include both CPU cores, flash, ram, maybe the PLD stuff, etc.