0 Replies Latest reply on Feb 8, 2017 7:10 AM by sqlsql_2244756

    sam4s i2c driver 1 byte read error fix

    sqlsql_2244756

      platform_result_t platform_i2c_transfer( const platform_i2c_t* i2c, const platform_i2c_config_t* config, platform_i2c_message_t* messages, uint16_t number_of_messages )

      {

          platform_result_t       result   =  PLATFORM_SUCCESS;

          Twi*                    twi      = ( Twi* )( i2c_runtime_data[i2c->i2c_block_id].peripheral->peripheral );

          platform_i2c_message_t* message_pointer;

       

          int i;

          int retry_count;

       

          /* Check input arguments */

          wiced_assert("Bad argument", (i2c != NULL) && ( config != NULL ) &&( messages != NULL ) && ( number_of_messages != 0 ));

       

          for ( i = 0; ( i < number_of_messages ) && ( result == PLATFORM_SUCCESS ); i++ )

          {

              message_pointer = &messages[i];

              wiced_assert("Message pointer shouldn't be null", message_pointer != NULL);

       

              for ( retry_count = 0; retry_count < message_pointer->retries; retry_count++ )

              {

                  i2c_runtime_data[i2c->i2c_block_id].current_message = message_pointer;

                  i2c_runtime_data[i2c->i2c_block_id].data_count      = 0;

                  i2c_runtime_data[i2c->i2c_block_id].transfer_status = 0;

       

                  /* Make sure all interrupts are disables at start */

                  twi->TWI_IDR = ~0UL;

       

                  if ( message_pointer->rx_buffer != NULL )

                  {

                      /* Initiate an RX transfer */

                      /* Set read mode and slave address */

                      twi->TWI_MMR = 0;

                      twi->TWI_MMR = TWI_MMR_MREAD | TWI_MMR_DADR(config->address);

       

                      /* Enable NACK, RXRDY interrupts */

                      twi->TWI_IER = TWI_IER_NACK | TWI_IER_RXRDY;

       

                      if ( message_pointer->rx_length == 1 )

                      {

                          /* There is only byte to process, go straight to transfer complete

                           * interrupt, and process the last byte there */

                          twi->TWI_IDR = TWI_IDR_RXRDY;

       

                          twi->TWI_CR = TWI_CR_STOP | TWI_CR_START;//darius need place her, before  twi->TWI_IER = TWI_IER_TXCOMP;

       

                          twi->TWI_IER = TWI_IER_TXCOMP;

       

                          /* Extract from sam4s user manual.

                           * When a single data byte read is performed, with or without internal address (IADR),

                           * the START and STOP bits must be set at the same time */

                          //twi->TWI_CR = TWI_CR_STOP | TWI_CR_START;//darius error her moved up

                      }

                      else

                      {

                          /* Only required for receive to reset TXCOMP state */

                          twi->TWI_CR = TWI_CR_START;

                      }

       

                  }