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Wake time from deep sleep has many moving parts. Since this involves a full boot, it depends on whether you are using the module or an SOC design, EEPROM or Serial flash (application + patch size), speed of NV access and 20732 or 20736/7. For the 2073XS modules, since they have an EEPROM internally, a good thumb rule is boot time* ~= 50ms + ~45mS/KByte of application + patch code (what's printed at the end of a build) assuming default I2C speed (400 KHz). For a 20732 chip-on-board design, if the EEPROM supports it, you can increase the read speeds to 1MHz instead of the default 400 KHz. But the boot time will not reduce by 2.5 times because there is a lot of processing involved during this process. So this will be 50mS + ~30mS/KByte of app + patch code. When NV storage is serial flash, boot time ~= 50mS + 4mS/KByte of code. For 20736/7 modules that have an EEPROM in them, boot time ~= 20mS + ~35mS/KByte of app + patch code @ 400 KHz. If I2C speed is increased to 1 MHz, this should be ~ 20mS + 23mS/KByte. If a serial flash is used for NV, boot time ~= 20mS + 900uS/KByte when SPI speed is 12 MHz.
*boot time here is the time from wake interrupt to application create call.
we are using SOC design and serial flash. I want to know the exact timing for "power on reset" and "Deep sleep mode". In our case BCM is interacting with STM controller through uart, STM is taking 150ms to wake-up from sleep mode and it is too fast compare to wake up from power on reset,where as in bcm is taking same time in both "power on reset" and "deep sleep mode" to wake-up (as per our observations it is taking 300ms), so we are loosing some data in boot up from wake up. So is it possible to decrease wake up time during Deep sleep mode?
If so can you share me the documents related to this.
Thanks & Regards,
Yashavanth K S
Unfortunately, documentation does not exist which outlines specific timing parameters for each. The answer I provided was provided to me by someone on the apps team a while back.