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给驱动芯片供电的DC-DC模块正常，IGBT模块是F3L200R12W2H3_B11，驱动芯片选取的是1ED020I12-F2 ，驱动电路如图所示。在上电压为300v的时候，12个驱动芯片坏了9个。后面更换了9个新的驱动芯片以后，上电，给占空比，单个的测G1和E1输出信号，(1)其中有三个只输出是-8V，更换稳压二极管后（如：D7）就可以正常工作了。(2)但是有的无输出，测了驱动芯片的左右侧电路发现，OUT输出电阻断路，有的电阻短路。重新焊接以后发现芯片开始发烫，新焊的电阻开始发黑。(3)还有的是输出在1-2V左右的输出。

请问技术人员，出现以上三种情况是什么原因？为什么-8v是二极管坏了。芯片发烫的原因又是因为什么？发烫的芯片所驱动的管子是T2/T3,T6/T7.都是中间的IGBT，这个是不是IGBT坏了，因为我的直流端口电压在300v,中间IGBT的耐压值是在650v,T1/T4在1200V。

Hi all,

I am using the cx3 to capture images with an imx219 camera module connected to the MIPI port. The cx3 is connected to the host pc via high-speed usb.

The problem I am facing is, that I only receive about 1/5 of the data I should get (independent from the amount of data - its 1/5 for a 3280x2464 image as well as for a 256x256 image). I do not get any errors from the mipi block during transmission. The received data seems, like some junks are missing here and there.

Here is the MIPI Block configuration:

CyU3PMipicsiCfg_t mipiConfig_imx219_RAW10_104MHz =
{
CY_U3P_MIPIOUT_DW_16, /* MIPI out parallel width packing --> here set to YUV422*/
2, /* Number of CSI data lanes. */
2, /* PLL clock input divider. */
129, /* PLL clock feedback divider. */
CY_U3P_CSI_PLL_FRS_63_125M,/* PLL clock range. */
CY_U3P_CSI_PLL_CLK_DIV_4, /* Divider for clock used to detect CSI LP<->HS transition. */
CY_U3P_CSI_PLL_CLK_DIV_4, /* Divider for clock used on the parallel GPIF interface. */
0x00, /* Reserved */
0x00, /* Reserved */
0x00, /* Reserved --> this line is the given value by the suite*/
100 /* Delay on the parallel output buffer of CSI interface. */
};

The camera module's clock is set to 104MHz (exactly as the MIPI block).

I load the GPIF using:

CyU3PMipicsiGpifLoad(CY_U3P_MIPICSI_BUS_16, 0x600); // where 0x600 is also the size of a DMA buffer

The DMA is in AUTO_MANY_TO_ONE (so no callback) mode with 2 Sockets on the GPIF side and one socket to the USB side.
I am using 4 buffers with a size of 0x600 and CY_U3P_DMA_MODE_BYTE.

The Endpoint is of type Bulk and the packet size set to 512.

After a lot of tests, I think the problem could be realted to the GPIF configuration, but I am not sure.
I read the data with libusb_bulk_read and also tried all kind of buffer sizes on the host pc's side.

I would be very grateful for any hints.

I use 1ED3122MC12HXUMA1 to drive the IMW120R060M1H, but I find that the output of 1ED3122MC12HXUMA1 is not stable, accompanied by frequency jitter, and there is oscillation of about 2V on the rising and falling edges. How can I suppress frequency jitter and oscillation. The waveforms, schematic and layout of PCB are as follows.

Dears

Please review my questions about secure booting as the following and give me your opinion. 

(1) I'm wondering that how to see current life cycle stage of Traveo II MCU ? 

(2) After successful secure booting,  how to get the result of successful secure booting ? 

Best regards, 

Wonjin. 

Hello,

I am trying to use MULTICAN with XMC4700 Relax Kit, But i am unable to transmit data over it. I have attached my project below - 

Please check my code and help me out with solution.

I am MURALI SELVAM from India, I plan to design Battery monitor circuit so I need TLE9015DQV and TLE9012DQU. If you have any reference design kindly provide me.

Hi,

I  want to configure my UART module  

TX should happen with 10US that i have configured with GPT ,

RX should happen with Interrupt based. 

same when i tested RX got struck in IfxStm_isDeadLine(inline) function.

I want to know why it is getting strucked

Hello Team,
We are planning to use the MOSFET IPTG039N15NM5 for one of our applications.
We are using a Photovoltaic MOSFET Driver VOM1271T to drive the MOSFET.
Hence the gate to source voltage will be 8.4V.
Attached is the snippet from the schematic of the same.

Our requirements are.

• Maximum drain voltage = 48V (so the MOSFET shall have a VDS > 60V)
• Low RDSon =  as low as possible
• Gate Capacitance = as low as possible (since the output current of the VOM1271T is only 15uA, a high gate capacitance will result in high turn on time).
• Low OFF state capacitance =  The drain to source off state capacitance shall be very low else we will get high frequency signals at the output even if the MOSFET is OFF.
• Continuous Drain Current = >150A (The continuous drain current of the MOSFET is marked as 190A in the datasheet.)
  So can you please confirm whether a single MOSFET is enough to carry 150A of current.
  On our system, the 150A current may last for 5-10 Seconds.
  The continuous current will be 90A for all other time.
  What are the precautions we need to take for such a high current.
  Please confirm whether a single MOSFET is able to carry this much current?.
  
  Looking for your reply.

I need to design 2 isolated supplies. For both, I am fed by a PFC front-end with a input voltage range 350V ~ 410V. My output shall be 28V. The 1st supply should deliver 200W and the 2nd supply should deliver 400W. I was first considering the LLC topology with ICE2HS01G-DS but after going into some reference material, found that EMI will be a problem later on due to the varying frequency of the converter. I therefore am considering a forward converter topology with an active clamp. I want to use the same topology for both designs in order to re-use circuitry and minimize risk. I came across the XDPP1100 digital power controller but what I would like to verify is whether the choice of topology and controller is in fact the optimum choice. I am not space constraint but my operating temperature will be at a maximum of 65 deg C, so efficiency is critical. I do not have forced air to cool down my design so I will have to rely on conduction cooling. Some inputs or advice will be greatly appreciated.