8 Replies Latest reply on Nov 17, 2020 10:45 PM by HemanthR_06

    Data gets flipped

    HaMu_4778661

      Hi,

       

      The goal is to test the data transfer between PC and FPGA, FX3 is used as an interface in between.

      I have used the code that is provided by AN65974 with no changes.

      In the loop back case if constant data is sent there comes no error, but while incremental data is sent there comes flips.

      I have attached the snapshot for the reference.

       

      Flips.jpg

       

      Is the data capturing too fast before the next data occurs ?

       

      Is there any way to clear this ?

       

      Regards,

      Haarika M