The GPIF interface has only one interfacing clock (PCLK), so FPGA/ISP is needed to combine both the streams if identical sensors are not being used in the design and output a single.
As mentioned in AN75779, Frame Valid 2, Line Valid 2, and PCLK 2 signals in figure 51 are connected to FX3, but they are not utilized by the GPIF II block because the image sensors are assumed to be synchronized so Frame Valis 1 and Line Valid 1 and PCLK1 are the only signals taken into consideration by the GPIF state machine
Is there a solution for dual video capture in single a chip without the help of FPGA to combine them into a stream?
>>As mentioned above GPIF interface has only one interfacing clock PCLK, two non-identical sensors cannot be connected directly to FX3. It can be done using FPGA/ISP.
the better is to put streams into different interface of USB PHY , or to put them into a different channel of USB hub chip.
>> Please confirm if you mean that two different UVC interface should be created to stream the video.