2 Replies Latest reply on Nov 6, 2020 10:07 AM by QuAs_4641531

    How do I report Bug? PSoC Creator UART sjplacer error (PSOC5, CY8C5668).

    QuAs_4641531

      Greetings- I have a PSoC5 design in Creator 4.3 with 2 1/2 Duplex RS-485 Uarts.  They were 1st placed with internal clocks @ 9600Baud.

       

      We need to change bit rates periodically during execution, so  I changed the UART configurations for external clocks and added the clock components as customary.  The design built fine, but never again.  Any attempts to change either UARTS configuration now will fail to build, with "can't fit into 24 UDB blocks", and the sjplacer.exe failure (0x0000000B).  Even reverting the schematic back to internal UART clocks, and deleting the clock components will cause the builder to fail.

       

      Enough resources were available for the first build. I don't think they are getting released when no-longer needed by the design.  We are tracking changes with GIT, and there seems to be an increasing number of keys being created, but very seldom see them deleted (only tagged as visible false)

       

      "Clean and Build" does not fix this.@

       

      Thanks

      Ken Ayre/Sielox