5 Replies Latest reply on Nov 9, 2020 5:20 AM by SananyaM_56

    TEST/I2C_SCL pin settings for CY7C65632-48AXCT

    NoAr_1540581

      Hello

       

      About TEST/ I2C_SCL pin settings, the setting of the external circuit of the TEST/I2C_SCL pin is directly connected to "GND".

      Q1)
      This cell has an RDN (internal pull-down), but is there any problem with external GND direct connection processing?

       

      Q2)
      In addition, there is the following description in the cell description of the data sheet.
      - I (RDN): Test: 0: Normal Operation & 1: Chip will be put in test mode.
      - I / O (RDN): I2C_SCL: Can be used as I2C clock pin to access I2C EEPROM.

      Which setting is the default state of the cell immediately after the power is turned on, Test or I2C_SCL?

      Q3)
      They expect "0: Normal Operation" operation by connecting to an external GND, but is there a possibility that it will be in other modes (Test mode, I2C_SCL mode)?

       


      Best Regrads

      Arai

        • 1. Re: TEST/I2C_SCL pin settings for CY7C65632-48AXCT
          SananyaM_56

          Hello Arai-san,

           

          1. No, there should be no issue in connecting the pin externally to ground for Normal operation.

           

          2. After the power on sequence, the pin will work as I2C_SCL to load configuration from EEPROM. Once the boot process is done, the pin will be used for TEST. If the TEST pin is 0, then it will be Normal operation mode otherwise the hub will enter into Test mode.

           

          3. As mentioned in the previous point, if the pin is used for TEST, and if it is grounded, then it will be in Normal operation mode and wont be used as I2C_SCL pin.

           

          Best Regards.
          Sananya

          • 2. Re: TEST/I2C_SCL pin settings for CY7C65632-48AXCT
            NoAr_1540581

            Hello Sananya san

             

             

            >2. After the power on sequence, the pin will work as I2C_SCL to load configuration from >EEPROM.

            >

            Q1) → At that time, I2C_SCL seems to be the operation to output the SCL clock in I2C mode.
            Since it is directly connected to GND with an external circuit, does the output collide when the SCL is in the High output state as a clock, causing a short mode internally and causing a problem?

             

            >Once the boot process is done, the pin will be used for TEST. If the TEST pin is 0, then it will be >Normal operation mode otherwise the hub will enter into Test mode.

            >

            Q2)

            → After that, when the boot process is complete and the pin is used as a TEST, the fact that the external GND setting is valid is that this cell is an RDN (internal pull-down), so was it better to ”open” the pin setting?

             

            Best Regards

            Arai

            • 3. Re: TEST/I2C_SCL pin settings for CY7C65632-48AXCT
              SananyaM_56

              Hello Arai-san,

               

              1. No, it shouldnt be a problem because I2C pins are open drain so if there is no pull up on the >line and the pin is connected to GND, the hub will not be able to drive the clock pulses on the line and I2C communication would fail.

               

              2. In the past tests, we have seen that without the external connection to GND, the hub can face some issues while booting up so it is recommended to have the pin connected to GND despite the internal pull down resistor.

               

              Best Regards,

              Sananya

              • 4. Re: TEST/I2C_SCL pin settings for CY7C65632-48AXCT
                NoAr_1540581

                Hello Sananya san

                 

                >1. No, it shouldnt be a problem because I2C pins are open drain so if there is no pull up on the >line and the pin is connected to GND, the hub will not be able to drive the clock pulses on the line >and I2C communication would fail.

                >

                In the customer's system, the setting of the external circuit of the TEST/I2C_SCL pin is directly connected to "GND". From the answer above,  they customer's sysytem cannot load the configuration from EEPROM after the power-on sequence. Is this correct?

                Also, Even if EEPSOM cannot be loaded, it is recognized that the operation as a HUB is normal. Is this correct?

                 

                Best Regards

                Arai

                • 5. Re: TEST/I2C_SCL pin settings for CY7C65632-48AXCT
                  SananyaM_56

                  Hello Arai-san,

                   

                  Yes, if the pin is connected to GND and not the EEPROM, then the I2C boot would fail and pin would be in Test pin mode and recognized to be set for normal operation.

                   

                  I would like to comment on a previous point, after confirming internally. I mentioned in the past tests, we have seen that without the external connection to GND, the hub can face some issues while booting up, but I checked that we can also leave the pin open and the internal pull down will configure it for normal operation. This way the customer wont have any concerns of internal short when SCL is in high output state.

                   

                  Best Regards,

                  Sananya