Can you please send us more information on the following?
- What is the clock frequency?
- Try Read Status Register 1 (command 0x05) and Read Status Register 2 (command 0x07) and let us know the values
- Please share with us the schematic
- Use scope capture Power On Reset timing (Vcc, RESET#, CS# on the same screen)
- What is the scope the attached csv files capture with? Is there an off-line viewer I can download to view the csv files?
1. 1 Mhz.
2. both are 0.
3. the chip is connected to a development kit using jumper wires, there is no schematic available.
4. All are continuously 3 volt. The scope I have available only has 4 inputs, I cannot capture them all in the same screen. I can capture them in a different screen.
5. the scope used is a rigol ds1054z. I have not found an offline viewer for the scope.
RDID (0x9F) is a very simple command (no address, no read latency needed). The flash doesn’t respond to RDID (0x9F) command correctly. The possible reasons could be:
- Flash connection issue
- schematic is crucial to check. So please if possible can you send the schematic for the flash connection
- Flash not initialized (POR) properly
- 4 inputs scope is enough to capture POR timing waveform. Only 3 signals are required for this purpose – Vcc, CS#, RESET#. Capture the waveform for the flash power up (i.e., Vcc ramping from 0V to 3.3V)
- Another test – keep Vcc stable at working voltage (i.e., 3.3V), pull RESET# signal low for >200ns, after RESET# signal comes high, wait >150ns. Then try RDID command again
- Access flash at wrong mode (i.e., SPI vs. QPI)
- Try RDID command at QPI (4-4-4) mode and SPI (1-1-1) mode
I think our test setup might not work as expected. When connecting the Vcc to the scope, the ID can be read.
We probably have too much interference between the signals. We try later with an improved setup.
Thanks for the help!
Thank you for your update. I am closing the thread.