I am not exactly sure I completely understood the question, especially the following part " I am controlling 2 devices, so one device could be controlled 50 microseconds later than the other device if the ISR must run to completion. This is not ideal. " Could you please elaborate the requirement.
Wow. It appears you are trying to be very accurate in timing using ISRs.
I might be able to provide some good suggestions.
Allow Any Other Interrupts while still inside IRQ?
Although it is possible to nest interrupts, it is generally not advisable if you can avoid it. This is due to a possibility of creating a stack overflow if not designed properly.
Here is a discussion post I submitted about general rules of using interrupts. Hopefully there are insights useful to you.
If you're trying to measure two signals with usec accuracy, the best way is to use a HW Timer with input capture. Input capture allows the count value to be store in a FIFO at the time of the signal change. In this case you don't need super-fast CPU processing and low-latency ISR processing to achieve a high degree of accuracy.
For example, let's say you want to measure the time between a signal going low to the same signal going high.
- Place this signal on the capture input of a timer
- Set an input clock of 24MHz.
- Select that you want the capture on either edge.
- You can set that you want ONE ISR after two capture events. (isr_2_edges)
- In the ISR, read the first capture value (first edge) from the 4 capture FIFO and substract the second capture value (second edge).
With a little math that takes into count the wrapping of the counter value at the end of the period, you have a timing value with 1/24MHz (=41.7 nsec) accuracy. If that's too accurate, you can lower the input clock to 1MHz. This will give you 1usec accuracy.