Can you please allow below mentioned queries and confirm us here -
1. Please probe at the PSoC side to check that the signal is coming to PSoC. Also, please check that if the pins are assigned correctly for PSoC device and also, if the clock speed is set correctly for synchronization.
2. ACKs and NACKs are managed by internal ISRs. so, can you tell if CY_ISR(XX_I2C_ISR) which you have mentioned is user defined or I2C component's generated interrupt?
3. Also, if possible can you please attach your project here so that we can understand the issue more clearly?