Which PSoC 6 sub family device are you using?
If you are using PSoC 63 family device, please refer section 13.1.5 Read While Write (RWW) Support in PSoC 63 BLE architecture TRM (link given below)
Please go through it and update if you need more details.
The PSoC 6 MCU supports read operations on one area while programming/erasing in another area. This is implemented to support firmware upgrades and parallel tasks in the dual-core system. The application flash contains four RWW sectors, UFLASH0 to UFLASH3, each 256KB in size. The EE emulation and SFlash are additional RWW sectors apart from the main flash. The RWW feature is available between sectors – you can read/execute from one sector while there is an ongoing write/erase operation in another sector. However, when the code execution/read is in the last 16 bytes of a given sector (say sector 0) and the flash write/erase operation is in the next sector (sector 1), an RWW violation may occur if prefetch is enabled. This is because prefetch will fetch the next 16 bytes of data, which is part of sector 1 while a write operation is underway in the same sector. This will result in a fault and should be considered during firmware design. Firmware can be designed to place dead code in the last 16 bytes of every sector making sure the last 16 bytes of a sector are never accessed or can disable prefetch during a flash write/erase operation.
That totally makes sense, but how can I guarantee that the flash sections I use will not overlap with application flash? Is there some way to find out where in flash my application will be stored?