It is not possible to use both the pins, VBUS_IN_DISCHARGE and VDDD for powering the chip at the same time.
If you use VBUS_IN_DISCHARGE for powering the chip, the internal regulator will generate VDDD of 3.3V for chip operation.
If you are using VDDD for powering the chip, it is recommended to disable the internal regulator using the function: pd_hal_disable_vreg().
If you connect both VDDD and VBUS_IN_DISCHARGE, you will be shorting the output of the internal regulator to your external power supply and back powering it which might cause damage to the chip.
Please refer to the application diagrams in the CCG3PA datasheet for both the cases of powering the chip.
May I know in which reference designs did you find that both pins are being used as power input?
I Refer The above reference design, please check it and let me know your views on that,
Thanks for your answer
In the reference design you have mentioned, VBUS_IN_DISCHARGE is being used for powering up the chip.
VDDD is connected to 1uF and 0.1uF capacitor.
ok i get the point. That was my mistake to understand the reference design.
thanks for your answer
have a good day.