10 Replies Latest reply on Oct 15, 2020 6:29 AM by WaMa_286156

    strange behavior at T flip flop output

    user_3716231

      I want to measure frequency and power factor,but I've gone through this issue for a week and don't understand why.when the frequency is set 60hz,I sometimes measure 20hz.the phase shift is set 30 deg,but sometimes it is measured 389.30.

       

      I know there are some solutions in the community post,but I want to apply my method to measure values and the post is locked.

      eliminate bounces at comparator output Re: bounces happened at comparator output

      measure frequency Re: bounces happened at comparator output

      phase shift greater than 30 Re: bounces happened at comparator output

       

      the yellow wave is comparator output.the blue one is tff output.

      the green circle is normal.the red one is abnormal.

      comp tff.PNG

       

       

       

       

      (please ignore disabled pages)

        • 1. Re: strange behavior at T flip flop output
          SampathS_11

          Can you kindly try once more by setting the Comparator power to Low Power? Kindly let me know the behaviour you find.

           

          Best regards,

          Sampath

          • 2. Re: strange behavior at T flip flop output
            LePo_1062026

            Hi,

             

            The TFF appears to be operating properly.   The issue is that you have tied the comparator output to the clock of the TFF.

            At the offending spot of your scope plot, you can see that the comparator output (YELLOW) is toggling multiple times within a very short amount of time.   This is causing multiple clock transitions at your TFF clock input.   This causes potentially many toggles of the TFF output (BLUE).   Given what is happening at your comparator output, this is the expected results of your TFF.

             

            You need to better filter your input to the comparator.   If you are using LINE AC from power as I suspect, it is notoriously noisy ALL points in the waveform.   This is due to many reasons including load transitions and other Conductive Emissions (CE) of upstream equipment.

             

            Your best bet is to place an external Low-Pass Filter on the input to the comparator with a corner frequency as close to 60Hz as you can tolerate.  The down-side with any analog LPF is that the cap used introduce a time delay to the wave.  This may make using a LPF in your case (power factor calculator) not practical.

             

            Suggestion:   Does your power factor (PF) calculation need to be made in FAST realtime?   If you can take a 'long' view, you can take multiple immediate PF measurements and throw away any that do not match the target 60Hz.  You can then average your PF measurements that match the 60Hz criteria.   This is a SW implementation without any additional external HW.

             

            If you can take the 'long' view, this is a practical approach since the power company is reasonably reliable for their output frequency.

             

            Len

            • 3. Re: strange behavior at T flip flop output
              user_3716231

              1.Could someone please tell me why the value of frequency is measured 20hz without sync component?

              2.The phase shift will be no more greater than 30 deg when adding sync component.why?

              • 4. Re: strange behavior at T flip flop output
                LePo_1062026

                Hi,

                 

                Can I recommend an experiment to prove out your PF phase detection circuit?

                 

                • Remove the AC stimulus from the Vadc and Iadc.
                • Insert a digital signal to Vadc at 60Hz 50% DC.
                • Insert a second digital signal to Iadc at 60Hz 50% DC.
                • Control the time delay (phase shift) of the second signal.

                 

                The digital square wave should be more friendlier to the Comparators

                 

                This test circuit should allow you to detect the frequency at 60Hz.  If you change the frequency, it should reflect this frequency in your debugging display.  This is to prove out the frequency detection part of the circuit without input noise.  It will also help to detect if there are any issues placing the SYNC component after the Comparators.

                 

                By time delaying the second Iadc input, you can control the phase shift and prove if your circuit (and SW) can properly detect the correct phase.

                 

                Once you're convinced your circuit can detect 0 to 359 degs of phase shift, then you should be able to reapply the AC input stimulus.

                 

                Len

                • 5. Re: strange behavior at T flip flop output
                  user_3716231

                  I have connected external hardware hysteresis.Should I remove them ?

                  • 6. Re: strange behavior at T flip flop output
                    LePo_1062026

                    I'm assuming you're referring to the hysteresis on the comparators since your schematic doesn't show any external components.

                     

                    You can leave the hysteresis.  With a digital input it won't make a difference.

                     

                    Len

                    • 7. Re: strange behavior at T flip flop output
                      user_3716231

                      Sampath,

                       

                      Sorry for the late reply.

                       

                      It seems to be normal at tff output when I set comparator to ultra low power mode,but I need more days to observe because I still get the wrong value of frequency.Maybe it is because of that behavior which I just didn't capture.Any idea about it,please tell me.

                       

                      Thanks your help.

                      comp_low_power.PNG

                      • 8. Re: strange behavior at T flip flop output
                        user_3716231

                        Len,

                         

                        I insert the sqaure wave to Vadc and Iadc and the wrong value still occured when waveform is from external wave generator.

                        • 9. Re: strange behavior at T flip flop output
                          LePo_1062026

                          user_3716231

                           

                          Since the wrong value is still occurring there appears to be something wrong with the logic or your detection circuit.

                          By using a scope on each stage of the circuit you can verify proper HW operation.

                           

                          If the HW is operating to design, then there may be a SW processing issue.

                           

                          Len

                          • 10. Re: strange behavior at T flip flop output
                            WaMa_286156

                            If your screen shot, which shows 80khz is the sampling rate of the logic or scope, then you may wish to up your sampling rate, or use peak detect on your scope acquisition, should that be available.  I suspect you are getting noise spikes and your comparators are sending them through.  Roughly, you will need about 10 times the frequency you wish to see correctly in order to see the basic information you want.  In this case, you need to narrow down your trigger and sample at 12 mhz to 20 mhz or better.

                             

                            If you are using 80khz, then frequencies of 160khz, 320khz, 640khz, etc.  will look like slower frequencies.  Nyquist and ADC sample aliasing comes in to bite you here.  I have had a beautiful 20khz sine wave from a 2mhz input signal on a scope due to aliasing.

                             

                            By using synchronization FF's, you cause the counter signal to ignore intermediate transitions due to noise, which a previous poster pointed out is being hinted at in your scope/logic shot.  That settled down your results, but probably not eliminated your problem.

                             

                            To "fix" your problem, I would suggest extra power supply filtering on the analog system, or a very small capacitor on the input to the PSOC.  Try 10pf -100pf or so on the input (assuming 60hz) to filter the noise out.  Use a 100 ohm resistor in series with the input, making an R/C filter.  You might be surprised at the results.