PSoC5LP Interrupt

[hata_3396041]

Hello

I have some questions about interrupts in psoc5LP.

[Question 1]

In the interrupt disabled section starting with CyEnterCriticalSection

Which behavior does the CYPRESS PSoC5LP microcontroller do, 1 or 2?

1. Interrupts generated in the interrupt disabled section are pending.　Issued at the same time as interrupt disable release.

2. No interrupt occurs in the interrupt disabled section. For interrupt generation conditions Even if applicable, it will be ignored (masked).

[Question 2]

2-1. If the answer to Question 1 is 1, is there a limit to the number of pending interrupts when multiple interrupts occur while interrupts are disabled?

2-2. Related to Question A. If multiple interrupts with different priorities occur, how is the restart from pending performed?

[Question 3]

In the case of multiple interrupts in the CYPRESS PSoC5 microcomputer, which operation is a or b?

3-1. When a low-priority interrupt ①occurs first, and a higher-priority interrupt ②occurs during ISR execution.

　a) The ISR of interrupt ① is canceled, jumps to the ISR of interrupt ②, and after the ISR of interrupt ② ends, returns to the ISR of interrupt ①.

　b) Jump to the ISR of interrupt ② after the ISR of interrupt ① ends.

3-2. When a high-priority interrupt ③ occurs first and a low-priority interrupt ②occurs during ISR execution.

   a) Jump to the ISR of interrupt ② after the ISR of interrupt ① ends.

   b) Interrupt ② is discarded.

Best Regards

Hayato

[hata_3396041]

I'm sorry. Question A written in Question 2-2 is Question 2-1.

[AikoO_51 · Accepted solution]

Thank you for contacting us.

I leave answers for your questions below.

[Question 1]

Answer: 1

[Question 2-1]

Answer:

It’s possible to be pending multiple interrupt while interrupts are disabled with CyEnterCriticalSection.

And there is not limitation for number of multiple interrupts.

But it’s not recommended to perform tons of interrupt because it will be taken a lot of time for process

[Question 2-2]

Answer:

They will be performed in order of priorities.

[Question 3-1]

Answer: a

But Interrupt “1” is not cancelled, but nested.

[Question 3-2]

Answer: a (③, that is mentioned as, is regarded as ①)

Regards,

Aiko

[hata_3396041]

Hello　Aiko-san

It was very helpful to receive a reply.

I thought that only one interrupt with high priority could be pending in the interrupt disabled section.

By the way, is there a case where the generated interrupt is discarded?

(If so, when?)

Best Regards

Hayato

[AikoO_51]

Hi Hayato-san

Generally, there is a case to miss an interrupt by some of reason.

For example, user doesn’t clear interrupt correctly. The interrupt with same priority happen at same time. If an interrupt is pending so long time, multiple same interrupt will be missed. and so on.

So user should implement the system with consideration of interrupt processing (occurrence, priority, etc).

Regards,

Aiko